PÊCHEUX François
Team : CIAN
- Sorbonne Université - LIP6
Boîte courrier 169
Couloir 24-25, Étage 4, Bureau 420
4 place Jussieu
75252 PARIS CEDEX 05
FRANCE
Tel: +33 1 44 27 52 53, Francois.Pecheux (at) nulllip6.fr
https://lip6.fr/Francois.Pecheux
Research activity
Mes recherches portent sur la modélisation et la simulation informatique des systèmes multidisciplines (Nu- mérique, AMS, Physique, Thermique, Optique, RF, Chimique, Biologique) complexes assistés par des architectures numériques massivement parallèle de type MPSoC.
Elles portent plus exactement sur les niveaux d?abstraction et les modèles de calcul utilisés en vue du prototypage virtuel simple et efficace de systèmes hétéogènes, ainsi que sur les outils logiciels permettant leur simulation rapide, parallélisable sur des machines SMP. J?utilise ou je participe au développement de 5 modèles de calcul (Cycle-Accurate Bit Accurate CABA, RTL synthétisable, Transaction Level Modeling with Distributed Time TLM-DT, Modélisation AMS conservative VHDL-AMS, Modélisation AMS non-conservative en SystemC-AMS avec Timed Data-Flow TDF) et essaie de les faire communiquer ensemble, ce qui soulève d?importants problèmes de synchronisation temporelle.
Ces Modèles de calcul, présentés dans mon HDR, suivent le même schéma : la représentation du temps, la définition d?un comportement élémentaire, la représentation des signaux, la composition des modèles, l?algorithme de résolution (solveur). Chaque modèle de calcul présenté est accompagné de nombreux exemples d?utilisation (MP2SoC tolérant aux pannes franches, réseaux de capteurs, laboratoire sur puce) montrant les passerelles méthodologiques que j?ai contribué à établir entre des disciplines qui restent encore partiellement isolées aujourd?hui. Mon objectif dans les années à venir est de développer un simulateur multi-disciplines parallélisable sur machine SMP, capable de gérer les disparités des constantes de temps entre les domaines.
Seven past PhD students (2009 - 2017) at Sorbonne University
- 2017
- BRIÈRE Alexandre : Modélisation système d’une architecture d’interconnexion RF reconfigurable pour les many-cœurs.
- BEN AOUN Cédric : Principes et réalisation d'un environnement de prototypage virtuel de systèmes hétérogènes composables.
- 2016
- VERNAY Benoit : Modélisation et simulation haut-niveau de dispositifs MEMS pour le prototypage virtuel multi-physique en SystemC AMS.
- ANDRADE Liliana : Principes et réalisation d'une interface de synchronisation interopérable entre modèles de calcul SystemC AMS pour le prototypage virtuel optimisé de systèmes multi-disciplines.
- 2013
- VIEIRA DE MELLO Aline : Architectures de micro-réseaux intégrés sur puce dans le systhèmes multi-processeurs massivement parallèles.
- 2011
- MAIA PESSOA Isaac : Simulation Parallèle de Systèmes Multi-Processeurs Intégrés sur Puce Modélisés en SystemC au Niveau Transactionnel.
- 2009
- VIAUD Emmanuel : Modélisation SystemC d'architectures multi-processeurs intégrées sur puce.
2004-2023 Publications
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2023
- Ah. Chaouche, J.‑M. Ilié, A. Hebik, F. Pêcheux : “Integration of a Contextual Observation System in a Multi-Process Architecture for Autonomous Vehicles”, Computing and Informatics, vol. 42 (3), pp. 716-740, (Slovak University Press, Bratislava) (2023)
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2022
- J.‑M. Ilié, Ah. Chaouche, F. Pêcheux : “A Reinforcement Learning Integrating Distributed Caches for Contextual Road Navigation”, International Journal of Ambient Computing and Intelligence, vol. 13 (1), pp. 1-19, (IGI Pub) (2022)
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2020
- F. Pêcheux, L. Andrade Porras, M.‑M. Louërat, I. Bournias, R. Chotin, D. Genius : “Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions”, 2020 Forum for Specification and Design Languages (FDL), Kiel, Germany, pp. 1-8, (IEEE) (2020)
- D. Genius, R. Cortés Porto, L. Apvrille, F. Pêcheux : “A Framework for Multi-level Modeling of Analog/Mixed Signal Embedded Systems”, 7th International Conference on Model-Driven Engineering and Software Development, MODELSWARD 2019, vol. 1161, Communications in Computer and Information Science, Prague, Czechia, pp. 201-224, (Springer), (ISBN: 978-3-030-37872-1) (2020)
- J.‑M. Ilié, K. Lahiani, Ah. Chaouche, F. Pêcheux : “An Efficient Learning Assistant for a Contextual Road Navigation”, Procedia Computer Science, vol. 170, pp. 522-529, (Elsevier) (2020)
- Ah. Chaouche, J.‑M. Ilié, F. Pêcheux : “Dealing with Failures for Execution Consistency in Context-aware Systems”, Procedia Computer Science, vol. 177, pp. 212-219, (Elsevier) (2020)
- J.‑M. Ilié, Ah. Chaouche, F. Pêcheux : “E-HoA: A Distributed Layered Architecture for Context-aware Autonomous Vehicles”, Procedia Computer Science, vol. 170, pp. 530-538, (Elsevier) (2020)
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2019
- D. Genius, R. Cortés Porto, L. Apvrille, F. Pêcheux : “A Tool for High-Level Modeling of Analog/Mixed Signal Embedded Systems”, Proceedings of the 7th International Conference on Model-Driven Engineering and Software Development, Prague, Czechia, pp. 435-442, (Scitepress) (2019)
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2018
- D. Genius, M.‑M. Louërat, F. Pêcheux, L. Apvrille, Haralampos‑G. Stratigopoulos : “Modeling Heterogeneous Embedded Systems with TTool”, DUHDe 2018 — 5th Workshop on Design Automation for Understanding Hardware Designs, Dresden, Germany (2018)
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2017
- A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “WiNoCoD: A Dynamically Reconfigurable RF NoC for Many-Core”, 12e colloque du GDR SOC-SIP du CNRS, Bordeaux, France (2017)
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2015
- A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “Un réseau sur puce RF reconfigurable dynamiquement pour les many-cœurs”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 34/1-2, PARALLÉLISME , ARCHITECTURE ET SYSTÈMES - PANORAMA DE LA RECHERCHE FRANCOPHONE, pp. 11-29, (Lavoisier) (2015)
- M. Azeem, A. Brière, M. Bouyer, J. Denoulet, F. Pêcheux, A. Pinna, B. Granado : “Interfacing SoCLib CABA models with NoCBench for NoC perfomance evaluation”, DASIP 2015 - The 2015 Conference on Design and Architecturesfor Signal and Image Processing, Cracow, Poland (2015)
- C. Ben Aoun, L. Andrade Porras, T. Maehne, F. Pêcheux, M.‑M. Louërat, A. Vachoux : “Pre-Simulation Elaboration of Heterogeneous Systems: The SystemC Multi-Disciplinary Virtual Prototyping Approach”, International Conference on Embedded Computer Systems: Architectures, Modelling and Simulation (SAMOS XV), Samos, Greece, pp. 278-285 (2015)
- A. Brière, E. Unlu, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, Y. Louët, Ch. Moy : “A Dynamically Reconfigurable RF NoC for Many-Core”, Proceedings of the 25th edition on Great Lakes Symposium on VLSI, Pittsburgh, United States, pp. 139-144, (ACM) (2015)
- B. Vernay, A. Krust, G. Schroepfer, F. Pêcheux, M.‑M. Louërat : “SystemC-AMS Simulation of Biaxial Accelerometer based on MEMS Reduced-Order Modeling”, Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2015, Montpellier, France, pp. 1-6, (IEEE) (2015)
- M. Barnasconi, M. Dietrich, K. Einwich, Th. Vörtler, J.‑P. Chaput, M.‑M. Louërat, F. Pêcheux, Zh. Wang, Ph. Cuenot, I. Neumann, Th. Nguyen, R. Lucas, E. Vaumorin : “UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases”, IEEE Design & Test, pp. 76-86, (IEEE) (2015)
- Y. Li, Zh. Wang, F. Pêcheux, M.‑M. Louërat, M. Barnasconi, Th. Vörtler, K. Einwich : “AMS System-level exploration and verification using UVM in SystemC and SystemC AMS”, 2nd Workshop Design Automation for Understanding Hardware Designs (DUHDe), Grenoble, France (2015)
- L. Andrade Porras, T. Maehne, A. Vachoux, C. Ben Aoun, F. Pêcheux, M.‑M. Louërat : “Pre-Simulation Symbolic Analysis of Synchronization Issues between Discrete Event and Timed Data Flow Models of Computation”, The 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, pp. 1671-1676 (2015)
- L. Andrade Porras, C. Ben Aoun, B. Vernay, T. Maehne, F. Pêcheux, M.‑M. Louërat : “Understanding the Heterogeneous Hardware: Do not forget the interconnection!”, 2nd Workshop Design Automation for Understanding Hardware Designs (DUHDe), Grenoble, France (2015)
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2014
- T. Maehne, Zh. Wang, L. Andrade Porras, B. Vernay, C. Ben Aoun, J.‑P. Chaput, M.‑M. Louërat, F. Pêcheux, A. Krust, G. Schroepfer, M. Barnasconi, K. Einwich, F. Cenni, O. Guillaume : “UVM-SystemC-AMS based Framework for the Correct by Construction Design of MEMS in their Real Heterogeneous Application Context,”, IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Marseille, France, pp. 862-865 (2014)
- Th. Vörtler, Th. Klotz, K. Einwich, Y. Li, Zh. Wang, M.‑M. Louërat, J.‑P. Chaput, F. Pêcheux, R. Iskander, M. Barnasconi : “Enriching UVM in SystemC with AMS extensions for randomization and coverage”, Design and Verification Conference and Exhibition (DVCON Europe), Munich, Germany (2014)
- R. Lucas, E. Vaumorin, Ph. Cuenot, Y. Li, Zh. Wang, M.‑M. Louërat, J.‑P. Chaput, F. Pêcheux, R. Iskander, M. Barnasconi, Th. Vörtler, K. Einwich : “Generation of UVM compliant Test Benches for Automotive Systems using IP-XACT with UVM-SystemC and SystemC AMS extensions”, Design and Verification Conference and Exhibition (DVCON Europe), Munich, Germany (2014)
- E. Unlu, M. Hamieh, Ch. Moy, M. Ariaudo, Y. Louët, F. Drillet, A. Brière, L. Zerioul, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, P. Garda, C. Duperrier, S. Quintanel, O. Romain : “An OFDMA Based RF Interconnect for Massive Multi-core Processors”, NoCS 2014 - Eighth IEEE/ACM International Symposium on Networks-on-Chip, Ferrara, Italy, pp. 182-183, (IEEE) (2014)
- F. Drillet, M. Hamieh, L. Zerioul, A. Brière, E. Unlu, M. Ariaudo, Y. Louët, E. Bourdel, J. Denoulet, A. Pinna, B. Granado, P. Garda, F. Pêcheux, C. Duperrier, S. Quintanel, Ph. Meunier, Ch. Moy, O. Romain : “Flexible Radio Interface for NoC RF-Interconnect”, Digital System Design (DSD), 2014 17th Euromicro Conference on, Verona, Italy, pp. 36-41, (IEEE) (2014)
- A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “A hierarchical RF interconnect for MPSoC”, 9e colloque du GDR SOC-SIP du CNRS, Paris, France (2014)
- Zh. Zhang, D. Refauvelet, A. Greiner, M. Benabdenbi, F. Pêcheux : “On-the-Field Test and Configuration Infrastructure for 2-D-Mesh NoCs in Shared-Memory Many-Core Architectures”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22 (6), pp. 1364-1376, (IEEE) (2014)
- B. Vernay, A. Krust, T. Maehne, G. Schroepfer, F. Pêcheux, M.‑M. Louërat : “Méthode de modélisation haut-niveau de dispositifs MEMS en SystemC-AMS”, Actes du neuvième colloque du GDR SOC-SIP du CNRS, Paris, France, pp. 3 (2014)
- M. Madec, F. Pêcheux, F. Jézéquel, Y. Gendrault, Ch. Lallement, J. Haiech : “Opportunities and challenges for the virtual prototyping of synthetic biological functions”, IEEE International Symposium on Circuits And Systems, ISCAS 2014, Melbourne, Australia, pp. 2013-2016, (IEEE) (2014)
- A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, P. Garda, M. Ariaudo, F. Drillet, C. Duperrier, M. Hamieh, S. Quintanel, O. Romain, L. Zerioul, Y. Louët, Ch. Moy, E. Unlu, E. Bourdel : “WiNoCoD : Un réseau d’interconnexion hiérarchique RF pour les MPSoC”, ComPAS'2014 : Conférence d'informatique en Parallélisme, Architecture et Système, Neuchâtel, Switzerland, pp. track architecture (2014)
- B. Vernay, A. Krust, T. Maehne, G. Schroepfer, F. Pêcheux, M.‑M. Louërat : “A Novel Method of MEMS System-Level Modeling via Multi-Domain Virtual Prototyping in SystemC-AMS”, EDAA/ACM PhD Forum at the Design, Automation and Test in Europe (DATE), Dresden, Germany (2014)
- Y. Li, Zh. Wang, M.‑M. Louërat, F. Pêcheux, R. Iskander, Ph. Cuenot, M. Barnasconi, Th. Vörtler, K. Einwich : “Virtual Prototyping, Verification and Validation Framework for Automotive Using SystemC, SystemC-AMS and SystemC-UVM”, Embedded Real Time Software and Systems (ERTS2), Toulouse, France, pp. 1-10 (2014)
- Th. Carle, M. Djemal, D. Genius, F. Pêcheux, D. Potop‑Butucaru, R. De Simone, F. Wajsbürt, Zh. Zhang : “Reconciling performance and predictability on a many-core through off-line mapping”, Proceedings ReCoSoC 2014, Montpellier, France, pp. 1-8, (IEEE) (2014)
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2013
- L. Andrade Porras, T. Maehne, M.‑M. Louërat, F. Pêcheux : “Time Step Control and Threshold Crossing Detection in SystemC AMS 2.0”, Actes du huitième colloque du GDR SOC-SIP du CNRS, Lyon, France, pp. 3 (2013)
- F. Pêcheux, M.‑M. Louërat, K. Einwich : “SystemC AMS and Cosimulation Aspects”, chapter in System-level Modeling of MEMS, vol. 10, Advanced Micro and Nanosystems, pp. 357-376, (Wiley) (2013)
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2012
- M. Djemal, F. Pêcheux, D. Potop‑Butucaru, R. De Simone, F. Wajsbürt, Zh. Zhang : “Programmable routers for efficient mapping of applications onto NoC-based MPSoCs”, DASIP 2012 -Conference on Design and Architectures for Signal and Image Processing, Karlsruhe, Germany, pp. 1-8, (IEEE) (2012)
- A. Lévêque, F. Pêcheux, M.‑M. Louërat, H. Aboushady, F. Cenni, S. Scotti, A. Massouri, L. Clavier : “Holistic Modeling of Embedded Systems with Multi-Discipline Feedback: Application to a Precollision Mitigation Braking System”, Design, Automation and Test in Europe (DATE'12), Dresden, Germany, pp. 739-744, (EDAA Publishing) (2012)
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2011
- F. Pecheux : “Modèles de calcul interopérables et optimisés pour la modélisation multi-niveaux et la simulation efficace de systèmes homogènes et hétérogènes complexes”, habilitation, phd defence 12/05/2011 (2011)
- Y. Gendrault, M. Madec, Ch. Lallement, F. Pêcheux, J. Haiech : “Synthetic biology methodology and model refinement based on microelectronic modeling tools and languages”, Biotechnology Journal, vol. 6 (7), pp. 796-806, (Wiley-VCH Verlag) (2011)
- Zh. Zhang, D. Refauvelet, A. Greiner, M. Benabdenbi, F. Pêcheux : “Localization of Damaged Resources in NoC Based Shared-Memory MP2SOC, using a Distributed Cooperative Configuration Infrastructure”, The 29th IEEE VLSI Test Symposium (VTS), Dana Point, California, United States (2011)
- I. Maïa Pessoa, A. Vieira De Mello, A. Greiner, F. Pêcheux : “Parallel TLM simulation of MPSoC on SMP workstations: Influence of communication locality”, ICM 2010 - 22nd International Conference on Microelectronics, Cairo, Egypt, pp. 359-362 (2011)
- Y. Gendrault, M. Madec, Ch. Lallement, F. Pêcheux, J. Haiech : “Computer-aided design in synthetic biology: A system designer approach”, 4th International Symposium on Applied Sciences in Biomedical and Communication Technologies (ISABEL 2011), Barcelona, Spain (2011)
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2010
- A. Habib, F. Pêcheux, M.‑M. Louërat : “Systemc-ams modeling of a pcr-ce lab-on-chip for multithreaded dna analysis”, 22nd International Conference on Microelectronics (ICM), Cairo, Egypt, pp. 483-486, (IEEE) (2010)
- F. Pêcheux, Kh. Zine el Abidine, A. Greiner : “Early power estimation in heterogeneous designs using Soclib and Systemc-ams”, International Workshop on Power And Timing Modeling Optimization and Simulation, PATMOS, vol. 6448, Lecture Notes in Computer Science, Grenoble, France, pp. 252, (Springer) (2010)
- A. Habib, F. Pêcheux : “Modeling and simulation of a manycore pcr-ce lab-on-chip for dna sequencing using systemc/systemc-ams”, BMAS : 2010 IEEE International Behavioral Modeling and Simulation Conference, San Jose, CA, United States, pp. 63-68, (IEEE) (2010)
- F. Pêcheux, A. Habib : “Towards high-level executable specifications of heterogeneous systems with systemc-ams : Application to a manycore pcr-ce lab on chip for dna sequencing.”, Forum on Specification and Design Languages, FDL 2010, Southampton, United Kingdom, pp. 1-6, (IEEE) (2010)
- E. Faure, M. Benabdenbi, F. Pêcheux : “Distributed online software monitoring of manycore architectures”, 16th IEEE International On-Line Testing Symposium, Corfou Island, Greece, pp. 56-61, (IEEE) (2010)
- F. Pêcheux, M. Madec, Ch. Lallement : “Is systemc-ams an appropriate promoter for the modeling and simulation of bio-compatible systems ?”, ISCAS : Proceedings of the 2010 IEEE International Symposium on Circuits and Systems, Paris, France, 2010. IEEE Computer Society., Paris, France, pp. 1791-1794, (IEEE) (2010)
- A. Vieira De Mello, I. Maïa Pessoa, A. Greiner, F. Pêcheux : “Parallel Simulation of SystemC TLM 2.0 Compliant MPSoC on SMP Workstations”, DATE 2010 - Design, Automation & Test in Europe Conference & Exhibition, Dresden, Germany, pp. 606-609 (2010)
- M. Barnasconi, K. Einwich, Ch. Grimm, F. Pêcheux : “Tutorial f1 : Application of the systemc-ams standard”, DATE 2010 - IEEE International Conference on Design, Automation and Test in Europe, Dresden, Germany (2010)
- A. Lévêque, F. Pêcheux, M.‑M. Louërat, H. Aboushady, M. Vasilevski : “SystemC-AMS Models for Low-Power Heterogeneous Designs: Application to a WSN for the Detection of Seismic Perturbations”, ARCS '10 - 23th International Conference on Architecture of Computing Systems, Hannover, Germany, pp. 1-6 (2010)
- E. Faure, G. Marchesan Almeida, M. Benabdenbi, P. Benoit, F. Clermidy, F. Pêcheux, G. Sassatelli, L. Torres : “An In-Memory Monitoring Database For Self Adaptive MP²SoCs”, IEEE International Conference on Design and Architectures for Signal and Image Processing, Edimbourg, United Kingdom, pp. 97-104 (2010)
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2009
- N. Pouillon, A. Bécoulet, A. Vieira De Mello, F. Pêcheux, A. Greiner : “A Generic Instruction Set Simulator API for Timed and Untimed Simulation and Debug of MP2-SoCs”, IEEE/IFIP International Symposium on Rapid System Prototyping, 2009. RSP '09., Paris, France, pp. 116-122 (2009)
- M. Benabdenbi, F. Pêcheux, E. Faure : “Online test and monitoring of multiprocessor socs : A software-based approach”, LATW’09 : Proceedings of the 10th Latin America Test Workshop, Buzios, Rio de Janeiro, Brazil, pp. 1-6, (IEEE) (2009)
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2008
- M. Vasilevski, N. Beilleau, H. Aboushady, F. Pêcheux : “Efficient and refined modeling of wireless sensor network nodes using SystemC-AMS”, PRIME 2008 - IEEE Ph.D. Research in Microelectronics and Electronics, Istanbul, Turkey, pp. 81-84, (IEEE) (2008)
- M. Vasilevski, F. Pêcheux, N. Beilleau, H. Aboushady, K. Einwich : “Modeling and Refining Heterogeneous Systems With SystemC-AMS: Application to WSN”, DATE'08 - IEEE Design, Automation and Test in Europe, Munich, Germany, pp. 134-139, (IEEE) (2008)
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2007
- M. Vasilevski, H. Aboushady, F. Pêcheux, L. De Lamarre : “Modeling Wireless Sensor Network nodes using SystemC-AMS”, ICM'07 - IEEE Internatonal Conference on Microelectronics, Le Caire, Egypt, pp. 53-56, (IEEE) (2007)
- M. Vasilevski, F. Pêcheux, H. Aboushady, L. De Lamarre : “Modeling heterogeneous systems using SystemC-AMS case study: A Wireless Sensor Network Node”, Behavioral Modeling and Simulation Workshop, 2007. BMAS 2007. IEEE International, San Jose, CA, United States, pp. 11-16, (IEEE) (2007)
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2006
- E. Viaud, F. Pêcheux : “A New Paradigm and Associated Tools for TLM/T Modeling of MPSoCs”, PRIME IEEE Conference on Ph.D. Research in MicroElectronics and Electronics, Otranto, Italy, pp. 217-220, (IEEE) (2006)
- F. Prégaldiny, F. Krummenacher, B. Diagne, F. Pêcheux, Ch. Lallement, J.‑M. Sallese : “Explicit modelling of the double-gate MOSFET with VHDL-AMS”, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, vol. 19 (3), pp. 239-256, (Wiley) (2006)
- E. Viaud, F. Pêcheux, A. Greiner : “An Efficient TLM/T Modeling and Simulation Environment Based on Conservative Parallel Discrete Event Principles”, DATE Design Automation and Test in Europe Conference, Munich, Germany, pp. 94-99, (IEEE) (2006)
- Ch. Lallement, F. Pêcheux, A. Vachoux, F. Prégaldiny : “Compact modeling of the MOSFET in VHDL-AMS”, chapter in Transistor Level Modeling for Analog/RF IC Design, pp. 243-269, (Springer Verlag), (ISBN: 978-1-4020-4555-4) (2006)
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2005
- F. Pêcheux, Ch. Lallement, A. Vachoux : “VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24 (2), pp. 204-225, (IEEE) (2005)
- F. Pêcheux, B. Allard, Ch. Lallement, A. Vachoux, H. Morel : “Modeling and simulation of multi-discipline systems using bond graphs and VHDL-AMS”, Proceedings of the 2005 International Conference on Bond Graph Modeling and Simulation, ICBGM '05, New Orleans, LA, United States, pp. 149-155 (2005)
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2004
- M. Benabdenbi, A. Greiner, F. Pêcheux, E. Viaud, M. Tuna : “STEPS: experimenting a new software-based strategy for testing SoCs containing P1500-compliant IP cores”, DATE 2004 - Design Automation and Test in Europe Conference, Paris, France, pp. 712-713, (IEEE) (2004)