LIP6 2004/003
- Thesis
Méthodes de réduction de réseaux RC appliquées aux outils de vérification de circuits submicroniques - P. Renault
- 137 pages - 12/22/2003- document en - http://www.lip6.fr/lip6/reports/2004/lip6.2004.003.pdf - 1,529 Ko
- Contact : patricia.renault (at) nulllip6.fr
- Ancien Thème : ASIM
- Keywords : Verification tool, model, reduction, interconnect resistance and capacitance, crosstalk noise.
- Publisher : Francois.Dromard (at) nulllip6.fr
Backend verifications represent an important part in the design flow of a digital system. These verifications are performed on a netlist resulted from the extraction of the layout. In the deep submicron technologies, this netlist contains the description of active elements, transistors, as well as passive elements such as parasitic interconnect resistance or capacitance. To provide a realistic estimation of electrical phenomenons, backend verification tools such as timing analyser or crosstalk noise evaluation tool have to take into account these parasitic elements. However, the amount of data required to represent these elements and the complexity of the underlying phenomenons make the integration of these elements hard if not impossible inside the verification algorithms. Thus, a simplified model is required to ease the verification. Here, we propose a method to obtain a simplified but still accurate model to represent the interconnection wires. An interconnection wire is extracted as a network of resistor and capacitor possibly coupled to other wires through coupling capacitance. The proposed method comprises two steps: Analysis and Reduction. During the analysis the time expression of the network's output is calculated. Two approaches are proposed. The direct approach works directly on the differential equations that characterize the network in the time domain. The indirect approach uses the Laplace transform and works in the frequency domain. Both approaches are based on matrix operations and polynomial root finding. We also propose an original technique for the classical problem of finding all the roots of a polynomial. The reduction step consists in determining the different parameters of a simplified scheme that fits the best the characteristics of the RC-network. To prove the feasibility and the accuracy of our method, a prototype tool that implements all concepts describe in this thesis has been developed.