1 Doctorant (Direction de recherche / Co-encadrement)

• BRIÈRE Alexandre : Modélisation système d'une architecture d'interconnexion RF pour les systèmes sur puce.

1 Docteur 2014

Publications 2006-2016

• 2016
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High-Level Virtual Prototyping of Signal Integrity in Bus Communication”, IEEE Transactions on Components Packaging and Manufacturing Technology, vol. 6 (6), pp. 864-872 (2016)
  • Z. Aloui, N. Ahamada, J. Denoulet, F. Pierre, M. Rayrole, M. Gatti, B. Granado : “Embedded real-time monitoring using SystemC in IMA network”, SAE 2016 Aerospace Systems and Technology Conference, SAE 2016 Aerospace Systems and Technology Conference, Hartford, USA, pp. 1-4 (2016)
• 2015
  • A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “Un réseau sur puce RF reconfigurable dynamiquement pour les many-cœurs”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 34/1-2, pp. 11-29, (Hermes) (2015)
  • A. Brière, E. Unlu, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, Y. Louët, Ch. Moy : “A Dynamically Reconfigurable RF NoC for Many-Core”, ACM Great Lakes Symposium on VLSI, Pittsburgh, USA, pp. 139-144, (ACM), (ISBN: 978-1-4503-3474-7) (2015)
  • M. Azeem, A. Brière, M. Bouyer, J. Denoulet, F. Pêcheux, A. Pinna, B. Granado : “Interfacing SoCLib CABA models with NoCBench for NoC perfomance evaluation”, DASIP 2015 - The 2015 Conference on Design and Architecturesfor Signal and Image Processing, Cracow, Poland (2015)
• 2014
  • A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “A hierarchical RF interconnect for MPSoC”, 9ème colloque du GDR SOC-SIP du CNRS, Paris, France (2014)
  • E. Unlu, M. Hamieh, Ch. Moy, M. Ariaudo, Y. Louët, F. Drillet, A. Brière, L. Zerioul, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, P. Garda, C. Duperrier, S. Quintanel, O. Romain : “An OFDMA Based RF Interconnect for Massive Multi-core Processors”, NoCS 2014 - Eighth IEEE/ACM International Symposium on Networks-on-Chip, Ferrara, Italy, pp. 182-183, (IEEE) (2014)
  • F. Drillet, M. Hamieh, L. Zerioul, A. Brière, E. Unlu, M. Ariaudo, Y. Louët, E. Bourdel, J. Denoulet, A. Pinna, B. Granado, P. Garda, F. Pêcheux, C. Duperrier, S. Quintanel, Ph. Meunier, Ch. Moy, O. Romain : “Flexible Radio Interface for NoC RF-Interconnect”, Digital System Design (DSD), 2014 17^th Euromicro Conference on, Verona, Italy, pp. 36-41, (IEEE) (2014)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in a USB 3.0 System”, Micro/Nano-Electronics Packaging and Assembly, Design and Manufacturing (MiNaPAD), Grenoble, France (2014)
  • A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, P. Garda, M. Ariaudo, F. Drillet, C. Duperrier, M. Hamieh, S. Quintanel, O. Romain, L. Zerioul, Y. Louët, Ch. Moy, E. Unlu, E. Bourdel : “WiNoCoD: Un réseau d’interconnexion hiérarchique RF pour les MPSoC”, ComPAS'2014 : Conférence d'informatique en Parallélisme, Architecture et Système, Neuchâtel, Switzerland, pp. track architecture (2014)
• 2013
  • M. Alassir, J. Denoulet, O. Romain, P. Garda : “Signal Integrity-Aware Virtual Prototyping of Field Bus-Based Embedded Systems”, Components, Packaging and Manufacturing Technology, IEEE Transactions on, vol. 3 (12), pp. 2081-2091, (ISBN: 2156-3950) (2013)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in a High Frequency Point-to-Point System with SystemC-AMS”, Conference on Design of Circuits and Integrated Systems (DCIS), Donostia-San Sebastian, Spain, pp. 1-4 (2013)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in High Frequency USB 3.0 Systems with SystemC-AMS”, Colloque du GDR Systemes materiels-logiciels integres, Lyon, France (2013)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “Modeling of Signal Integrity in Bus Communications with Timed Data Flow SystemC-AMS”, FDL 2013 - Forum on Specification Design Languages, Paris, France, pp. 1-6, (ISBN: 1636-9874) (2013)
• 2012
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in Field Bus Communication with SystemC-AMS”, IEEE International Conference on Electronics, Circuits and Systems (ICECS), Seville, Spain, pp. 889-892, (IEEE), (ISBN: 978-1-4673-1261-5) (2012)
  • R. Wang, M. Alassir, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “Modeling Field Bus Communication with SystemC-AMS”, Colloque du GDR SOC-SIP, Paris, France, pp. 1-4 (2012)
• 2010
  • A. Suissa, O. Romain, J. Denoulet, Kh. Hachicha, P. Garda : “Empirical Method Based on Neural Networks for Analog Power Modeling”, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, vol. 29 (5), IEEE (Ed.), pp. 839-844, (ISBN: 0278-0070) (2010)
  • A. Suissa, O. Romain, J. Denoulet, Kh. Hachicha, P. Garda : “Temperature and Supply Voltage Aware Power Modeling of Analog Functions at System Level”, DTIS: IEEE International Conference on Design & Test of Integrated Systems in Nanoscale Technology, IEEE (Ed.), Hammamet, Tunisia, pp. 1-6, (ISBN: 978-1-4244-6338-1) (2010)
• 2009
  • L. Lacassagne, A. Manzanera, J. Denoulet, A. Mérigot : “High performance motion detection: some trends toward new embedded architectures for vision systems”, Journal of Real Time Image Processing, vol. 4 (2), Springer (Ed.), pp. 127-146, (ISBN: 1861-8200) (2009)
  • J. Le Kernec, Ph. Dreuillet, G. Bobillot, J.‑C. Castelli, P. Garda, O. Romain, J. Denoulet : “Case study analysis of linear Chirp and multi-tones radar signals through simulations and measurement with HYCAM-Research test bench”, Colloque national GDR SOC SIP, Orsay, France, pp. 1-5 (2009)
  • J. Le Kernec, Ph. Dreuillet, G. Bobillot, P. Garda, O. Romain, J. Denoulet : “Case study analysis of linear Chirp and Multitones (OFDM) radar signals through simulations and measurement with HYCAM-Research test bench”, RADAR 2009 - International Radar Conference - Surveillance for a Safer World, Bordeaux, France, pp. 1-5, (ISBN: 978-2-912328-55-7) (2009)
• 2008
  • J. Denoulet, A. Mérigot : “An architecture based on reconfigurability and asynchronism for real-time image processing”, Journal of Real Time Image Processing, vol. 3 (3), Springer (Ed.), pp. 119-130, (ISBN: 1861-8200) (2008)
• 2006
  • M. Alassir, J. Denoulet, O. Romain, P. Garda : “A SystemC AMS model of an 12C bus controller”, Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. International Conference on, Tunis, Tunisia, pp. 154-158, (IEEE), (ISBN: 0-7803-9726-6) (2006)
  • M. Alassir, J. Denoulet, O. Romain, P. Garda : “An I2C Bus Controller Model and Simulation in SystemC-AMS”, Design of Circuits and Integrated Systems, International Conference (DCIS 06), Barcelona, Spain (2006)
  • M. Alassir, J. Denoulet, O. Romain, P. Garda : “Modelling and Simulation of an I2C Bus Controller in SystemC-AM”, Forum on specification and Design Languages, FDL 2006, ESCI (Ed.), Darmstadt, Germany, pp. 121-128, (ISBN: 978-3-00-019710-9) (2006)