ZOU Hao
Supervision : Marie-Minerve LOUËRAT
Co-supervision : ISKANDER Ramy
Methodology for Substrate Parasitic Modeling in HV/HT Smart Power Technology - Application to Automotive Industry
Smart Power Integrated Circuits (ICs) are intensively used in automotive embedded systems due to their unique capabilities to merge low power and high voltage (HV) devices on the same chip. In such systems, induced electrical coupling noise due to switching of the power stages is a big issue. During switching, parasitic voltages and currents, lead to a local shift of the substrate potential that can reach hundreds of millivolts, and can severely disturb low voltage circuits. Such parasitic signals are known to represent the major cause of failure and costly circuit redesign in power ICs. Most solutions are layout dependent and are thus difficult to optimize using available electrical simulator. The lack for a model strategy prohibits an efficient design strategy and fails at giving clear predictions of perturbations in HV ICs. Here, we present a post-layout extraction and simulation methodology for substrate parasitic modeling. We have developed a Computer-Aided-Design (CAD) tool for substrate extraction from layout patterns. The extraction employs a meshing algorithm for substrate model generation. The behavior of the substrate currents can be taken into account in post-layout simulation, and enables an exhaustive failure analysis due to substrate coupling.
Several industrial test cases are considered to validate this work, the interference of substrate currents in a current mirror configuration, and a standard automotive test in ams AG technology. This methodology is also applied to a HV BCD technology of STMicroelectronics. Eventually, by using the proposed CAD tool, it becomes possible to simulate the behaviors of substrate noises before fabrication.
Defence : 12/12/2016 - 14h - Site Jussieu 23-24/207
Jury members :
ALLARD Bruno (INSA Lyon, Laboratoire Ampère) [Rapporteur]
NOUET Pascal (Université Montpellier, LIRMM) [Rapporteur]
SEEBACHER Ehrenfried (amsAG)
SICARD Etienne (INSA Toulouse)
TISSERAND Pierre (Valeo)
MEHREZ Habib (UPMC, LIP6)
ISKANDER Ramy (Intento Design)
LOUERAT Marie-Minerve (CNRS, LIP6)
2014-2016 Publications
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2016
- H. Zou : “Methodology for Substrate Parasitic Modeling in HV/HT Smart Power Technology - Application to Automotive Industry”, thesis, defence 12/12/2016, supervision Louërat, Marie-Minerve, co-supervision : Iskander, Ramy (2016)
- Y. Moursy, H. Zou, R. Iskander, P. Tisserand, D.‑M. Ton, G. Pasetti, Eh. Seebacher, A. Steinmair, Th. Gneiting, H. Alius : “Towards Automatic Diagnosis of Minority Carriers Propagation Problems in HV/HT Automotive Smart Power ICs”, Design, Automation & Test in Europe Conference & Exhibition (DATE) 2016 Conference, Dresde, Germany (2016)
- H. Zou, Y. Moursy, R. Iskander, J.‑P. Chaput, M.‑M. Louërat : “An Adaptive Mesh Refinement Strategy of Substrate Modeling for Smart Power ICs”, 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, Canada, pp. 2358-2361 (2016)
- Y. Moursy, H. Zou, R. Khalil, R. Iskander, P. Tisserand, D.‑M. Ton, G. Pasetti, M.‑M. Louërat : “Efficient Substrate Noise Coupling Verification and Failure Analysis Methodology for Smart Power ICs in Automotive Applications”, IEEE Transactions on Power Electronics, (Institute of Electrical and Electronics Engineers) (2016)
- H. Zou, Y. Moursy, R. Iskander, A. Steinmair, H. Gensinger, Eh. Seebacher, J.‑P. Chaput, M.‑M. Louërat : “Using CAD Tool for Substrate Parasitic Modeling in Smart Power Technology”, IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 2323-2333, (IEEE) (2016)
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2015
- H. Zou, Y. Moursy, R. Iskander, J.‑P. Chaput, M.‑M. Louërat, C. Stefanucci, P. Buccella, M. Kayal, J.‑M. Sallese, Th. Gneiting, H. Alius, A. Steinmair, Eh. Seebacher : “A CAD integrated solution of substrate modeling for industrial IC design”, 2015 20th International Mixed-Signal Testing Workshop (IMSTW), Paris, France (2015)
- C. Stefanucci, P. Buccella, Y. Moursy, H. Zou, R. Iskander, M. Kayal, J.‑M. Sallese : “Substrate modeling to improve reliability of high voltage technologies”, 20th International Mixed-Signal Testing Workshop (IMSTW), 2015, Paris, Paris, France (2015)
- H. Zou, Y. Moursy, R. Iskander, C. Stefanucci, P. Buccella, M. Kayal, J.‑M. Sallese : “Substrate noise modeling with dedicated CAD framework for smart power ICs”, 2015 IEEE International Symposium on Circuits and Systems (ISCAS) n°1554, Lisbon, Portugal, pp. 4 (2015)
- Y. Li, H. Zou, Y. Moursy, R. Iskander, R. Sobot, M.‑M. Louërat : “Optimization and Co-Simulation of an Implantable Telemetry System by Linking System Models to Nonlinear Circuits”, chapter in Computational Intelligence in Analog an Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, pp. 83-113, (Springer) (2015)
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2014
- H. Zou, Y. Moursy, R. Iskander, M.‑M. Louërat, J.‑P. Chaput : “A novel CAD framework for substrate modeling”, 10th Conference on Ph.D Research in Microelectronics and electronics, Grenoble, France, pp. 1-4, (IEEE) (2014)