2005-2026 Publications

• 2026
  • A. Gicquel, L. Claudepierre, D. Hardy, K. Heydemann, E. Rohou : “CHAPATI: End-to-end Methodology to Conduct Multi-Faults Injection Campaigns”, 2026 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington, DC, United States, pp. 90-102, (IEEE), (ISBN: 979-8-3195-0894-2) (2026)
  • N. Amiot, Quentin L. Meunier, K. Heydemann, E. Encrenaz : “aLEAKator: HDL Mixed-Domain Simulation for Masked Hardware & Software Formal Verification”, IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2026 (2), pp. 132–166, (IACR) (2026)
• 2024
  • S. Tollec, V. Hadžić, P. Nasahl, M. Asavoae, R. Bloem, D. Couroussé, K. Heydemann, M. Jan, S. Mangard : “Fault-resistant partitioning of secure CPUs for system Co-verification against faults”, IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2024 (4), pp. 179-204, (IACR) (2024)
  • A. Calle Viera, A. Berzati, K. Heydemann : “Fault Attacks Sensitivity of Public Parameters in the Dilithium Verification”, Smart Card Research and Advanced Applications, vol. 14530, Lecture Notes in Computer Science, Amsterdam, Netherlands, pp. 62-83, (Springer Nature Switzerland), (ISBN: 978-3-031-54409-5) (2024)
• 2023
  • S. Tollec, M. Asavoae, D. Couroussé, K. Heydemann, M. Jan : “µArchiFI: Formal modeling and verification strategies for microarchitetural fault injections”, Proceedings of the 23^rd Conference on Formal Methods in Computer-Aided Design – FMCAD 2023, Ames, IO, United States, pp. 101-109, (TU Wien Academic Press), (ISBN: 978-3-85448-060-0) (2023)
  • L. Casalino, N. Belleville, D. Couroussé, K. Heydemann : “A Tale of Resilience: On the practical security of masked software implementations”, Cryptographic Hardware and Embedded Systems, Prague, Czechia (2023)
  • L. Casalino, N. Belleville, D. Couroussé, K. Heydemann : “A tale of resilience: On the practical security of masked software implementations”, IEEE Access, vol. 11, pp. 84651-84669, (IEEE) (2023)
  • Quentin L. Meunier, E. Pons, K. Heydemann : “LeakageVerif: Efficient and Scalable Formal Verification of Leakage in Symbolic Expressions”, IEEE Transactions on Software Engineering, vol. 49 (6), pp. 3359-3375, (Institute of Electrical and Electronics Engineers) (2023)
  • Th. Chamelot, D. Couroussé, K. Heydemann : “MAFIA: Protecting the microarchitecture of embedded systems against fault injection attacks”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (IEEE) (2023)
  • A. Gicquel, D. Hardy, K. Heydemann, E. Rohou : “SAMVA: Static Analysis for Multi-Fault Attack Paths Determination”, Constructive Side-Channel Analysis and Secure Design, Munich (Allemagne), Germany, pp. 3-22, (Springer), (ISBN: 978-3-031-29497-6) (2023)
• 2022
  • A. Grandmaison, K. Heydemann, Quentin L. Meunier : “ARMISTICE: Microarchitectural Leakage Modeling for Masked Software Formal Verification”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41 (11), pp. 3733-3744, (IEEE) (2022)
  • Th. Chamelot, D. Couroussé, K. Heydemann : “SCI-FI: Control Signal, Code, and Control Flow Integrity against Fault Injection Attacks”, 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, pp. 556-559, (IEEE) (2022)
  • S. Tollec, M. Asavoae, D. Couroussé, K. Heydemann, M. Jan : “Exploration of fault effects on formal RISC-V microarchitecture models”, 2022 Workshop on Fault Detection and Tolerance in Cryptography (FDTC), Virtual event, Italy, pp. 73-83, (IEEE) (2022)
• 2021
  • S. Vu, A. Cohen, A. De Grandmaison, Ch. Guillon, K. Heydemann : “Reconciling optimization with secure compilation”, Proceedings of the ACM on Programming Languages, vol. 5 (OOPSLA), Chicago, IL, United States, pp. 1-30, (ACM) (2021)
  • J.‑L. Danger, A. Facon, S. Guilley, K. Heydemann, U. Kühne, A. Si Merabet, M. Timbert, B. Pecatte : “Processor Anchor to Increase the Robustness Against Fault Injection and Cyber Attacks”, Proceedings of COSADE workshop, vol. 12244, Lecture Notes in Computer Science, Lugano, Switzerland, pp. 254-274, (Springer, Cham.) (2021)
  • N. Belleville, D. Couroussé, E. Encrenaz, K. Heydemann, Q. Meunier : “PROSECCO: Formally-proven secure compiled code”, Automation in Cybersecurity 2021 - Proceedings of the 28^th Computer & Electronics Security Application Rendezvous (C&ESAR 2021), vol. 3056, CEUR Workshop Proceedings, Rennes, France, pp. 13-25, (ceur-ws.org) (2021)
• 2020
  • P. Kiaei, D. Mercadier, P.‑E. Dagand, K. Heydemann, P. Schaumont : “Custom Instruction Support for Modular Defense against Side-channel and Fault Attacks”, International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2020, Lecture Notes in Computer Science, Lugano, Switzerland (2020)
  • Quentin L. Meunier, I. Ben El Ouahma, K. Heydemann : “SELA: a Symbolic Expression Leakage Analyzer”, International Workshop on Security Proofs for Embedded Systems, Visioconference, France (2020)
  • N. Belleville, D. Couroussé, K. Heydemann, Q. Meunier, I. Ben El Ouahma : “Maskara: Compilation of a Masking Countermeasure with Optimised Polynomial Interpolation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39 (11), (IEEE) (2020)
  • S. Vu, K. Heydemann, A. De Grandmaison, A. Cohen : “Secure delivery of program properties through optimizing compilation”, CC '20: 29^th International Conference on Compiler Construction, San Diego, CA, United States, pp. 14-26, (ACM) (2020)
• 2019
  • K. Heydemann, J.‑F. Lalande, P. Berthomé : “Formally verified software countermeasures for control-flow integrity of smart card C code”, Computers & Security, vol. 85, pp. 202-224, (Elsevier) (2019)
  • J. Proy, K. Heydemann, F. Majeric, A. Cohen, A. Berzati : “Studying EM Pulse Effects on Superscalar Microarchitectures at ISA Level”, (2019)
  • S. Vu, K. Heydemann, A. De Grandmaison, A. Cohen : “Compilation and Optimization with Security Annotations”, European LLVM Developers Meeting, Bruxelles, Belgium (2019)
  • I. Ben El Ouahma, Q. Meunier, K. Heydemann, E. Encrenaz : “Side-channel robustness analysis of masked assembly codes using a symbolic approach”, Journal of Cryptographic Engineering, pp. 1-12, (Springer) (2019)
  • J.‑B. Bréjon, K. Heydemann, E. Encrenaz, Quentin L. Meunier, S. Vu : “Fault attack vulnerability assessment of binary code”, Cryptography and Security in Computing Systems (CS2’19), Valencia, Spain, pp. 13-18, (ACM) (2019)
  • J. Proy, K. Heydemann, A. Berzati, F. Majeric, A. Cohen : “A First ISA-Level Characterization of EM Pulse Effects on Superscalar Microarchitectures”, ARES '19 Proceedings of the 14^th International Conference on Availability, Reliability and Security, Canterbury, United Kingdom, pp. 7:1-7:10, (ACM Press) (2019)
• 2018
  • N. Belleville, D. Couroussé, K. Heydemann, H.‑P. Charles : “Automated Software Protection for the Masses Against Side-Channel Attacks”, ACM Transactions on Architecture and Code Optimization, vol. 15 (4), pp. 47:1-47:27, (Association for Computing Machinery) (2018)
  • N. Belleville, K. Heydemann, D. Couroussé, Th. Barry, B. Robisson, A. Seriai, H.‑P. Charles : “Automatic Application of Software Countermeasures Against Physical Attacks”, chapter in Cyber-Physical Systems Security, pp. 135-155, (Springer International Publishing), (ISBN: 978-3-319-98934-1) (2018)
  • J.‑L. Danger, A. Facon, S. Guilley, K. Heydemann, U. Kühne, A. Si Merabet, M. Timbert : “CCFI-Cache: A Transparent and Flexible Hardware Protection for Code and Control-Flow Integrity”, 2018 21^st Euromicro Conference on Digital System Design (DSD), Prague, Czechia, pp. 529-536, (IEEE) (2018)
  • D. Couroussé, Th. Barry, B. Robisson, N. Belleville, Ph. Jaillon, O. Potin, H. Le Bouder, J.‑L. Lanet, K. Heydemann : “All paths lead to Rome: Polymorphic Runtime Code Generation for Embedded Systems”, Fifth Workshop on Cryptography and Security in Computing Systems, Manchester, United Kingdom, pp. 17-18, (ACM) (2018)
• 2017
  • K. Heydemann : “Sécurité et performance des applications : analyses et optimisations multi-niveaux”, habilitation, phd defence 11/20/2017 (2017)
  • J. Proy, K. Heydemann, A. Berzati, A. Cohen : “Compiler-Assisted Loop Hardening Against Fault Attacks”, ACM Transactions on Architecture and Code Optimization, vol. 14 (4), pp. 36, (Association for Computing Machinery) (2017)
  • I. Ben El Ouahma, Quentin L. Meunier, K. Heydemann, E. Encrenaz : “Symbolic Approach for Side-Channel Resistance Analysis of Masked Assembly Codes”, Security Proofs for Embedded Systems, Taipei, China (2017)
  • N. Belleville, Th. Barry, A. Seriai, D. Couroussé, K. Heydemann, B. Robisson, H.‑P. Charles : “The Multiple Ways to Automate the Application of Software Countermeasures against Physical Attacks : Pitfalls and Guidelines”, Cyber-Physical Security Education Workshop, Paris, France (2017)
  • Th. Barry, D. Couroussé, B. Robisson, K. Heydemann : “Automated Combination of Tolerance and Control Flow Integrity Countermeasures against Multiple Fault Attacks”, European LLVM Developers Meeting, Saarbrücken, Germany (2017)
• 2016
  • A. Drebes, J.‑B. Bréjon, A. Pop, K. Heydemann, A. Cohen : “Language-Centric Performance Analysis of OpenMP Programs with Aftermath”, IWOMP 2016 - 12^th International Workshop on OpenMP, vol. 9903, Lecture Notes in Computer Science, Nara, Japan, pp. 237-250, (Springer) (2016)
  • A. Drebes, A. Pop, K. Heydemann, A. Cohen, N. Drach : “Scalable Task Parallelism for NUMA: A Uniform Abstraction for Coordinated Scheduling and Memory Management”, PACT'16 - ACM/IEEE Conference on Parallel Architectures and Compilation Techniques, Haifa, Israel, pp. 125-137 (2016)
  • A. Drebes, A. Pop, K. Heydemann, N. Drach, A. Cohen : “NUMA-aware scheduling and memory allocation for data-flow task-parallel applications”, ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Barcelona, Spain, pp. 44:1-44:2, (ACM New York, NY, USA) (2016)
  • A. Drebes, A. Pop, K. Heydemann, A. Cohen : “Interactive visualization of cross-layer performance anomalies in dynamic task-parallel applications and systems”, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Uppsala, Sweden, pp. 274-283 (2016)
  • L. Goubet, K. Heydemann, E. Encrenaz, R. De Keulenaer : “Efficient Design and Evaluation of Countermeasures against Fault Attack with Formal Verification”, Smart Card Research and Advanced Applications - 14^th International Conference, CARDIS 2015, Bochum, Germany, November 4-6, 2015. Revised Selected Paper, vol. 9514, Lecture Notes in Computer Science, Bochum, Germany, pp. 177-192, (Springer International Publishing) (2016)
• 2015
  • A. Drebes, K. Heydemann, A. Pop, A. Cohen, N. Drach : “Automatic Detection of Performance Anomalies in Task-Parallel Programs”, 1^st Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014), Paderborn, Germany (2015)
• 2014
  • A. Drebes, K. Heydemann, N. Drach, A. Pop, A. Cohen : “Topology-Aware and Dependence-Aware Scheduling and Memory Allocation for Task-Parallel Languages”, ACM Transactions on Architecture and Code Optimization, vol. 11 (3), pp. 30, (Association for Computing Machinery) (2014)
  • J.‑F. Lalande, K. Heydemann, P. Berthomé : “Software countermeasures for control flow integrity of smart card C codes”, ESORICS - 19^th European Symposium on Research in Computer Security, vol. 8713, Lecture Notes in Computer Science, Wroclaw, Poland, pp. 200-218, (Springer International Publishing) (2014)
  • N. Moro, K. Heydemann, E. Encrenaz, B. Robisson : “Formal verification of a software countermeasure against instruction skip attacks”, Journal of Cryptographic Engineering, vol. 4 (3), pp. 145-156, (Springer) (2014)
  • A. Drebes, K. Heydemann, N. Drach, P. Antoniu, A. Cohen : “Aftermath: Performance analysis of task-parallel applications on many-core NUMA systems”, Tenth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy (2014)
  • N. Moro, K. Heydemann, A. Dehbaoui, B. Robisson, E. Encrenaz : “Fault attacks on two software countermeasures”, TRUDEVICE 2014, Paderborn, Germany (2014)
  • A. Drebes, A. Pop, K. Heydemann, A. Cohen, N. Drach : “Aftermath: A graphical tool for performance analysis and debugging of fine-grained task-parallel programs and run-time systems”, Seventh Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG-2014), Vienna, Austria (2014)
  • N. Moro, K. Heydemann, A. Dehbaoui, B. Robisson, E. Encrenaz : “Experimental evaluation of two software countermeasures against fault attacks”, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Arlington, United States, pp. 112-117 (2014)
• 2013
  • N. Moro, A. Dehbaoui, K. Heydemann, B. Robisson, E. Encrenaz : “Electromagnetic fault injection on microcontrollers”, Chip-to-Cloud Security Forum 2013, Nice, France (2013)
  • K. Heydemann, N. Moro, E. Encrenaz, B. Robisson : “Formal verification of a software countermeasure against instruction skip attacks”, PROOFS 2013, Santa-Barbara, United States (2013)
  • N. Moro, A. Dehbaoui, K. Heydemann, B. Robisson, E. Encrenaz : “Electromagnetic fault injection: towards a fault model on a 32-bit microcontroller”, Proceedings of the 10^th workshop on Fault Diagnosis and Tolerance in Cryptography, Santa-Barbara, United States, pp. 77-88 (2013)
• 2012
  • P. Berthomé, K. Heydemann, X. Kauffmann‑Tourkestansky, J.‑F. Lalande : “High level model of control flow attacks for smart card functional security”, AReS 2012 - 7^th International Conference on Availability, Reliability and Security, Prague, Czechia, pp. 224-229, (IEEE Computer Society) (2012)
• 2011
  • P. Berthomé, K. Heydemann, X. Kauffmann‑Tourkestansky, J.‑F. Lalande : “Simulating physical attacks in smart card C codes: the jump attack case”, e-Smart, Nice - Sophia Antipolis, France (2011)
  • O. Gamoudi, N. Drach, K. Heydemann : “Using runtime activity to dynamically filter out inefficient data prefetches”, Euro-Par European Conference on Parallel computing, vol. 6852, Lecture Notes in Computer Science, Bordeaux, France, pp. 338-350, (Springer) (2011)
  • P. Berthomé, K. Heydemann, X. Kauffmann‑Tourkestansky, J.‑F. Lalande : “Attaques physiques à haut niveau pour le test de la sécurité des cartes à puce”, Journée Sécurité des Systèmes & Sûreté des Logiciels, Saint-Malo, France (2011)
  • H. Ozaktas, K. Heydemann : “Compression de code pour processeurs haute performance”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 30 (9), pp. 1035-1059, (Lavoisier) (2011)
• 2010
  • P. Berthomé, K. Heydemann, X. Kauffmann‑Tourkestansky, J.‑F. Lalande : “Attack model for verification of interval security properties for smart card C codes”, PLAS '10 - 5^th ACM SIGPLAN Workshop on Programming Languages and Analysis for Security, Toronto, Canada, pp. 2:1-2:12, (ACM) (2010)
  • H. Cassé, K. Heydemann, H. Ozaktas, J. Ponroy, Ch. Rochange, O. Zendra : “A framework to experiment optimizations for real-time and embedded software”, International Conference on Embedded Real Time Software and Systems (ERTS2), Toulouse, France (2010)
• 2009
  • H. Ozaktas, K. Heydemann : “Compression de code pour processeurs haute-performance”, SympA Symposium en Architecture de Machines, Toulouse, France (2009)
  • A. Djabelkhir, N. Drach, K. Heydemann, F. Arzel : “Parallélisation supervisée pour les multicoeurs embarqués”, SympA Symposium en Architecture de Machines, Toulouse, France (2009)
  • O. Gamoudi, N. Drach, K. Heydemann : “Vers une méthode adaptative de préchargement de données”, SympA Symposium en Architecture de Machines, Toulouse, France (2009)
  • H. Ozaktas, K. Heydemann, Ch. Rochange, H. Cassé : “Impact of Code Compression on Estimated Worst-Case Execution Times”, 17^th International Conference on Real-Time and Network Systems, Paris, France, pp. 55-66 (2009)
• 2008
  • A. Coveliers, K. Heydemann, N. Drach : “Étude de la sensibilité aux jeux de données de la compilation itérative”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 27 (6), pp. 757-777, (Lavoisier) (2008)
• 2006
  • A. Coveliers, K. Heydemann, N. Drach : “Sensibilité aux jeux de données de la compilation itérative”, SympA Symposium en Architecture de Machines, Perpignan, France, pp. 35-46 (2006)
  • K. Heydemann, F. Bodin, P. Knijnenburg, L. Morin : “UFS : a global trade-off strategy for loop unrolling for VLIW architectures”, Concurrency and Computation: Practice and Experience, vol. 18 (11), pp. 1413-1434, (Wiley) (2006)
• 2005
  • K. Heydemann, F. Bodin, H.‑P. Charles : “Software-Only Compression System for Trading-off Code Size and Performance”, SCOPES 2005 - 9^th International Workshop on Software and Compilers for Embedded Systems, Dallas, Texas, United States, pp. 27-36, (ACM) (2005)