K. Dioury, A. Lester, A. Debreil, G. Avot, A. Greiner, M.‑M. Rosset‑Louërat : “Hierarchical Static Timing Analysis at Bull with HiTas”, Design Automation and Test in Europe Conference User Forum (DATE'2000), Paris, France, pp. 55-60 (2000)
1999
K. Dioury, A. Greiner, M.‑M. Rosset‑Louërat : “Hierarchical Static Timing Analysis for CMOS ULSI Circuits”, International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU'99), Monterey, CA, United States, pp. 65-70 (1999)
K. Dioury, A. Greiner, M.‑M. Rosset‑Louërat : “Accurate static timing analysis for deep submicronic CMOS circuits”, International Conference on Very Large Scale Integration (VLSI'97), IFIP - The International Federation for Information Processing, Gramado, Brazil, pp. 439-450, (Springer) (1997)