| Équipes actuelles : | ACASA ALMASTY ALSOC APR BD CIAN ComplexNetworks DECISION DELYS LFI MOCAH MoVe NPA PEQUAN PolSys QI RO SMA SYEL |
| Ancienne équipe : | Phare |
| Publications ALSOC | 2017 | 2018 | 2019 | 2020 | 2021 | 2022 | 2023 | Total |
|---|---|---|---|---|---|---|---|---|
| Livres | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Éditions de livres | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 2 |
| Articles de revues | 4 | 3 | 3 | 5 | 3 | 3 | 6 | 27 |
| Chapitres de livres | 0 | 2 | 1 | 0 | 0 | 0 | 0 | 3 |
| Conférences | 11 | 17 | 17 | 13 | 15 | 11 | 8 | 92 |
| Habilitations | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| Thèses | 2 | 0 | 2 | 3 | 2 | 2 | 3 | 14 |
- D. Genius, I. Bournias, L. Apvrille, R. Chotin : “High-level Partitioning and Design Space Exploration for Cyber Physical Systems”, Proceedings of the 8th International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD, Valletta, Malta, pp. 84-91, (SCITEPRESS) [Genius 2020a]
- D. Genius, L. Apvrille : “Hardware / Software / Analog System Partitioning with SysML and SystemC-AMS”, 10th European Congress on Embedded Real Time Systems (ERTS2020), Toulouse, France [Genius 2020b]
- D. Genius, R. Cortés Porto, L. Apvrille, F. Pêcheux : “A Framework for Multi-level Modeling of Analog/Mixed Signal Embedded Systems”, Model-Driven Engineering and Software Development, vol. 1161, Communications in Computer and Information Science, Prague, Czechia, pp. 201-224, (Springer) [Genius 2020c]
- C. Hanen, A. Munier‑Kordon : “Two Deadline Reduction Algorithms for Scheduling Dependent Typed-tasks Systems”, ROADEF 2020, Montpellier, France [Hanen 2020a]
- P. Kiaei, D. Mercadier, P.‑E. Dagand, K. Heydemann, P. Schaumont : “Custom Instruction Support for Modular Defense against Side-channel and Fault Attacks”, International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2020, Lecture Notes in Computer Science, Lugano, Switzerland [Kiaei 2020]
- A. Kordon, N. Tang : “Evaluation of the Age Latency of a Real-Time Communicating System using the LET paradigm”, ECRTS 2020, vol. 165, Leibniz International Proceedings in Informatics (LIPIcs), Modena, Italy, (Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik) [Kordon 2020b]
- F. Laniel, D. Carver, J. Sopena, F. Wajsbürt, J. Lejeune, M. Shapiro : “MemOpLight: Leveraging application feedback to improve container memory consolidation”, NCA 2020 - 19th IEEE International Symposium on Network Computing and Applications, Cambridge / Virtual, United States, pp. 1-10 [Laniel 2020a]
- F. Laniel, D. Carver, J. Sopena, F. Wajsbürt, J. Lejeune, M. Shapiro : “MemOpLight: Leveraging application feedback to improve container memory consolidation”, NCA 2020 - 19th IEEE International Symposium on Network Computing and Applications, Cambridge / Virtual, United States, pp. 1-10 [Laniel 2020b]
- F. Lemaitre, A. Hennequin, L. Lacassagne : “How to speed Connected Component Labeling up with SIMD RLE algorithms”, Workshop on Programming Models for SIMD/Vector Processing (WPMVP@PPoPP), San Diego, Californie, United States [Lemaitre 2020]
- Quentin L. Meunier, I. Ben El Ouahma, K. Heydemann : “SELA: a Symbolic Expression Leakage Analyzer”, International Workshop on Security Proofs for Embedded Systems, Visioconference, France [Meunier 2020]
- F. Pêcheux, L. Andrade Porras, M.‑M. Louërat, I. Bournias, R. Chotin, D. Genius : “Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions”, 2020 Forum for Specification and Design Languages (FDL), Kiel, Germany, pp. 1-8, (IEEE) [Pêcheux 2020]
- A. Petreto, Th. Romera, F. Lemaitre, M. Bouyer, B. Gaillard, P. Menard, Q. Meunier, L. Lacassagne : “Real-time embedded video denoiser prototype”, 9th International Symposium - Optronics in Defense and Security (Optro), Paris, France [Petreto 2020]
- P. VIVET, E. Guthmuller, Y. Thonnart, G. Pillonnet, G. Moritz, I. Miro‑Panades, C. Fuguet, J. Durupt, Ch. Bernard, D. Varreau, J. Pontes, S. Thuries, D. Coriat, M. Harrand, D. Dutoit, D. Lattard, L. Arnaud, J. Charbonnier, P. Coudrain, A. Garnier, F. Berger, A. Gueugnot, A. Greiner, Quentin L. Meunier, A. Farcy, A. Arriordaz, S. Chéramy, F. Clermidy : “A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm 2 Inter-Chiplet Interconnects and 156mW/mm 2 @ 82%-Peak-Efficiency DC-DC Converters”, 2020 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, United States, pp. 46-48, (IEEE) [VIVET 2020]
- S. Vu, K. Heydemann, A. De Grandmaison, A. Cohen : “Secure delivery of program properties through optimizing compilation”, CC '20: 29th International Conference on Compiler Construction, San Diego, CA, United States, pp. 14-26, (ACM) [Vu 2020]