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LIP6 2001/023

  • Thesis
    Une méthode d'évaluation et de synthèse des communications dans les systèmes intégrés matériel-logiciel
  • D. Hommais
  • 164 pages - 09/13/2001- document en - http://www.lip6.fr/lip6/reports/2001/lip6.2001.023.pdf - 864 Ko
  • Contact : Denis.Hommais (at) nulllip6.fr
  • Ancien Thème : ASIM
  • This thesis proposes a method for synthesis and evaluation of communications in hardware-software systems on a chip. The starting point of communication synthesis is a task graph describing the application that the target system should achieve as well as an assignment of the various tasks of the graph to the software and hardware components of the system. The method for communication synthesis proposed here is based on the instanciation of a communication scheme for each channel of the graph. These communication schemes describe the means used to transfer data through the channel and to manage the channel status depending on the emitting and receiving tasks implementation, i.e hardware or software. These schemes allow to draw the specifications of a generic hardware interface module to implement the hardware part of the communications. We propose an architecture of this module offering a vci interface so that it can be adapted to various on chip interconnect. The implementation of a communication scheme consists then in instanciating one or more interface modules for hardware communications, and for software communications, in substituting the primitives used in the parallel description by those corresponding to the scheme. This method has been used in the design of an application and demonstrates that automation of communication synthesis is feasable using predefined communication schemes. In order to evaluate systems designed using the synthesis method proposed, components of an embedded system are modeled using communicating finite state machines. Advantage is taken from properties of state machines to determine statically an evaluation order and to use a simple and cycle-accurate simulation Algorithm for system evaluation. This simulation technique has been implemented in cass, the cycle accurate system siumlation tool. Significant speedup obtained compared to existant simulators demonstrates the relevancy of the simulation method chosen.
  • Keywords : Embedded systems, System on a chip, hardware-software codesign, system simulation, cycle true simulation, communication synthesis
  • Publisher : Francois.Dromard (at) nulllip6.fr
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