LIP6 2001/019
- Thesis
Conception et réalisation d'un noyau de communication bâti sur la la primitive d'écriture distante, pour machines parallèles de type 'grappe de PCs' - A. Fenyö
- 294 pages - 07/05/2001- document en - http://www.lip6.fr/lip6/reports/2001/lip6.2001.019.pdf - 3,563 Ko
- Contact : alex (at) nullfenyo.net
- Ancien Thème : ASIM
- Keywords : parallel computer, cluster of workstations, programming environment, remote write, reliability, memory management, dynamic resource allocation
- Publisher : Francois.Dromard (at) nulllip6.fr
This Ph.D Thesis presents the design and construction of MPC-OS, a communication kernel built on the remote-write primitive and dedicated to parallel computers made of clusters of workstations. Moreover, it discusses a stack of protocols implemented inside the Unix kernel, and available either to the user-level processes or to the operating system internal modules. Based on a simple Direct Memory Access hardware primitive for Gigabit interconnect networks, MPC-OS provides many value-added services : communications through virtual channels, reliable transmissions, data exchanges between virtual memory areas and memory management preserving the integrity of communication bu_ers. In order to get as much efficiency as possible, zero-copy mechanisms were used for all those services. This constraint represents the major difficulty of this work. The dynamic allocation of resources is handled by a distributed manager, based on a multi-threaded Object Request Broker specially designed for MPC-OS. After a detailed survey of the software performances, we studied the transmission reliability issue through a new approach : a probabilistic model in fault coupling allowed us to show that, if we fulfil some basic requirements, an elementary protocol may achieve both good performances and signi_cant reliability. Today, MPC-OS runs on various MPC clusters and is spread out over several French universities. It has allowed the optimised port of the major parallel programming environments such as PVM and MPI to the MPC computer. Some computer manufacturers (GEC Marconi Aerospace Systems and Parsytec Computer) have used it to validate their hardware developments based on hardware components from the MPC computer.