ALI EL SAYED Sarah
Team : CIAN
- Sorbonne Université - LIP6
Boîte courrier 169
Couloir 24-25, Étage 4, Bureau 415
4 place Jussieu
75252 PARIS CEDEX 05
Tel: +33 1 44 27 70 12, Sarah.ElSayed (at) nulllip6.fr
Supervision : Haralampos STRATIGOPOULOS
Fault Tolerance in Hardware Spiking Neural Networks
Artificial Intelligence (AI) and machine learning algorithms are taking up the lion's share of the technology market nowadays, and hardware AI accelerators are foreseen to play an increasing role in numerous applications, many of which are mission-critical and safety-critical. This requires assessing their reliability and developing cost-effective fault tolerance techniques; an issue that remains largely unexplored for neuromorphic chips and Spiking Neural Networks (SNNs).
A tacit assumption is often made that reliability and error-resiliency in Artificial Neural Networks (ANNs) are inherently achieved thanks to the high parallelism, structural redundancy, and the resemblance to their biological counterparts. However, prior work in the literature unraveled the falsity of this assumption and exposed the vulnerability of ANNs to faults. This requires assessing their reliability and developing cost-effective fault tolerance techniques; an issue that remains largely unexplored for neuromorphic chips and Spiking Neural Networks (SNNs). In this thesis, we tackle the subject of testing and fault tolerance in hardware SNNs. We start by addressing the issue of post-manufacturing test and behavior-oriented self-test of hardware neurons. Then we move on towards a global solution for the acceleration of testing and resiliency analysis of SNNs against hardware-level faults. We also propose a neuron fault tolerance strategy for SNNs, optimized for low area and power overhead.
Finally, we present a hardware case-study which would be used as a platform for demonstrating fault-injection experiments and fault-tolerance capabilities.
Defence : 10/28/2021 - 14h - Soutenance format virtuel : < https://zoom.us/j/4260158336?pwd=WGN6d2trc01NK2gxR1kxZW5KZENndz09 >
Jury members :
BOSIO Alberto (INL, Ecole Centrale de Lyon) [Rapporteur]
SANCHEZ Ernesto (Politecnico di Torino) [Rapporteur]
SENTIEYS Olivier (INRIA, Université de Rennes)
ALOUANI Ihsen (IEMN, UPolytech HF)
VATAJELU Ioana (CNRS, TIMA, Université de Grenoble-Alpes)
CAMUNAS-MESA Luis (IMSE, Universidad de Sevilla)
STRATIGOPOULOS Haralampos (CNRS, LIP6/ Sorbonne Université)
- S. Ali El Sayed : “Fault Tolerance in Hardware Spiking Neural Networks”, thesis, defence 10/28/2021, supervision Stratigopoulos, Haralampos (2021)