PhD graduated
Team : ALSOC
Departure date : 02/08/2019
Supervision : Lionel LACASSAGNE
Co-supervision : ROUGERON Gilles

Parallélisation d’un code éléments finis spectraux. Application au contrôle non destructif par ultrasons

Non-Destructive Testing (NDT) is a set of fundamental industrial process methods to ensure the objects quality by detecting defects within industrial parts. In order to design and qualify new NDT methods, the Département Imagerie et Simulation pour le Contrôle (DISC) within the CEA develops the CIVA simulation platform to model the CND with diverse techniques, including ultrasounds. In order to take into account a wide range of defect geometries with a high level accuracy, the CIVA-SFEM software based on the high order spectral finite element method (SFEM) has been developed. The cost of using this numerical method constitutes a major hindrance on its industrial use.
The subject of this thesis is to study numerous ways to optimize the SFEM computation time. The goal is to improve performance based on easily accessible architectures, namely SIMD multicore processors and graphics processors. As the computational kernels are limited by memory accesses (indicating a low arithmetic intensity), most of the optimizations presented are aimed at reducing and accelerating memory accesses. Improved matrix and vectors indexing, a combination of loop transformations, task parallelism (multithreading) and data parallelism (SIMD instructions) are transformations aimed at cache memory optimal use, registers intensive use and multicore SIMD parallelization. The results are convincing: the proposed optimizations increase the performance (between x6 and x11) and speed up the computation (between x9 and x16). The SIMDized implementation is up to x4 better than the vectorized implementation. The GPU implementation is between two and three times faster than the CPU one, knowing that a NVLink high-speed connection will allow a correct masking of memory transfers.
The proposed transformations form a methodology to optimize intensive computation codes on common architectures and to make the most of the possibilities offered by multithreading and SIMD instructions.
Defence : 02/08/2019 - 14h - Site Jussieu 25-26/105
Jury members :
M. Alain Mérigot, Univ. Paris Sud [Rapporteur]
M. David Defour, Univ. Perpignan [Rapporteur]
Mme. Fabienne Jezequel, Sorbonne Université
M. Daniel Etiemble, Univ. Paris Sud
M. Lionel Lacassagne, Sorbonne Université
M. Vincent Bergeaud, CEA LIST, Saclay

2019 Publications

 Mentions légales
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