Optimal Filter Implementation in Fixed Point Arithmetic
Embedded systems implement signal processing systems, such as linear filters, for example for communication through networks. These devices are subject to various constraints, such as power consumption, time-to-market, area consumption, and so on, that is necessary to optimize while guaranteeing reliability and accuracy of the implemented systems.
Fixed-point arithmetic is generally used instead of floating-point arithmetic for signal processing embedded systems because it is less expensive, all devices support fixed-point numbers (as they are implemented only using integers), allows arbitrary word-lengths in hardware implementation and is enough accurate for signal processing programs.
Fixed-point computations need the operands of an operation to be aligned together with the same position of the binary point. This leads to quantification errors and the goal is to minimize these round-off effects onto the final result, by proposing a guarantee on the output error.
During this thesis, a methodology has been proposed which implements a given algorithm in fixed-point using analytical approach, and generates some codes. This methodology consider both software and hardware targets. The hardware approach is realized solving a word-length optimization problem.
A tool, named FiPoGen, has been developed that realizes this methodology and automatically yields fixed-point code corresponding to a given filter algorithm with a guarantee on the output error.
Defence : 11/27/2014 - 14h - Site Jussieu 25-26/105 Jury members : Daniel Ménard, Professeur INSA Rennes, IETR [rapporteur]
Matthieu Martel, Maître de conférences Université de Perpigna Via Domitia, LIRMM [rapporteur]
Florent De Dinechin, Professeur INSA de Lyon, CITI
Stef Graillat, Professeur, Université Pierre et Marie Curie, LIP6
Christophe Jego, Professeur Institut Polytechnique de Bordeaux, IMS
Laurent-Stéphane Didier, Professeur Université de Toulon, IMATH
Thibault Hilaire, Maître de conférences Université Pierre et Marie Curie, LIP6
D. Ménard, R. Rocher, O. Sentieys, N. Simon, L.‑S. Didier, Th. Hilaire, B. Lopez, E. Goubault, S. Putot, F. Vedrine, M. Najahi, G. Revy, L. Fangain, Ch. Samoyeau, F. Lemonnier, Ch. Clienti : “Design of Fixed-Point Embedded Systems (defis) French ANR Project”, DASIP: Design and Architectures for Signal and Image Processing, Karlsruhe, Germany, pp. 365-366 (2012)