ARCHitectures based on unconventional accelerators for dependable/energY efficienT AI Systems
Artificial Intelligence (AI) can power autonomous vehicles, provide strategic advantages through large-scale data analytics, and enable intelligence gathering and surveillance through advanced computer vision, opening a wide range of defence applications.
Conventional Von Neumann architectures, despite their flexibility, are inefficient for AI workloads due to data duplication and data movement bottlenecks, which severely limit the efficiency in the rapid processing of large amount of information and streaming data needed by AI algorithms.
In edge computing devices, crucial for defense applications, this inefficiency is compounded by energy limitations.
To overcome these challenges, specialised hardware and programming paradigm shift are needed to accelerate AI workloads. With the end of Moore’s law and Dennard scaling, simply scaling up existing architectures is no longer viable. Novel architectures are needed to improve performance per Watt and bypass the efficiency limits imposed by the Von Neumann bottleneck.
ARCHYTAS aims to investigate unconventional AI accelerators that take advantage of novel technologies: optoelectronic-based accelerators, volatile and non-volatile processing-in-memory, and neuromorphic devices. These technologies promise to mitigate the Von Neumann bottleneck by integrating processing and memory. ARCHYTAS also explores the integration of CMOS-based systems with analogue accelerators, as well as new programming models to improve the programmability, performance portability, and productivity of these emerging parallel systems through a hardware-AI co-design approach. The technological ambition of ARCHYTAS is to bridge the gaps in multi-modal sensing integration and AI processing, providing solutions that fit the non-functional requirements of future autonomous vehicles for defense applications.
The ARCHYTAS AI accelerators will be validated within the context of defense AI use cases in land, aerial, maritime, and space settings.
Project Leader : Haralampos Stratigopoulos
01/12/2024
Systèmes Bio-inspirés distribués de confiance : bases théoriques et mise en œuvre matérielle
Project Leader : Haralampos Stratigopoulos
01/10/2023
Trusted SMEs for Sustainable Growth of Europeans Economical Backbone to Strengthen the Digital Sovereignty
The internet of things (IoT) is promising as it drives the datafication of our everyday life and thus, leverages synergies between originally considered “dead” things and enables them to proactively serve humans. IoT leads to a high automation potential with which we improve the life of billions of people and compensate for societal problems such as a growingly old population, missing high-skilled labour across Europe or the efficiency limits in current production capabilities. IoT5.0, an Artificial Intelligence (AI) -assisted Internet of Things, could even more benefit society, as the devices could even learn how to provide more value. But the ubiquitous connectivity comes at a cost. Security levels have to rise tremendously to ensure a network stays secure and safe for humans. This additional effort often is a burden for small and medium sized enterprises as the complexity and security demands of such systems rise faster than available resources. This is especially dangerous as a single corrupted, malicious device can result in the exploitation of the entire network of connected devices by an attacker. Consequently, RESILIENT TRUST focuses on end-to-end security of IoT processing chains with a focus on strong exploitation for SMEs. This vision will be realized by developing specialized hardware to establish TRUST in-between a network and a wall of RESILIENCE even against new attack methods such as post quantum attacks and AI based attacks. The architecture of the secure processing chain will be carefully built after threat modelling, asset identification, risk analysis, security objectives and requirements definition. Consequently, RESILIENT TRUST will address and significantly mitigate these major risks to enable IoT5.0. That way this project will be a driver for sustainable development and the generation of convenience and wealth. A solution is proposed to ensure end-to-end security by boosting RESILIENCE and TRUST along different key supply chains of IoT device
Project Leader : Haralampos Stratigopoulos
01/10/2023
A network of excellence for distributed, trustworthy, efficient and scalable AI at the Edge
The vision of dAIEDGE Network of Excellence (NoE) is to strengthen and support the development of the dynamic European edge and distributed Artificial Intelligence (AI) ecosystem as an essential ingredient in the growth and competitiveness of European industrial sectors. The dAIEDGE Network aims to reinforce the research and innovation value chains to accelerate the digital and green transitions through advanced edge AI technologies, applications, and innovations, building on Europe's existing assets and industrial strengths. In parallel, it will fortify the edge AI research and industrial communities through technological developments beyond state of the art and become a dependable and strategic pillar for the European AI Lighthouse. This will be achieved by mobilising and connecting the European AI and edge AI constituency, the relevant stakeholders, European partnerships, and projects, to provide roadmaps, guidelines and trends supporting the next-generation edge AI technologies. The key aim is to support and ensure rapid development, market uptake and open strategic sovereignty for Europe in the critical technologies for distributed edge AI (hardware, software, frameworks, tools). The dAIEDGE NoE will play a catalyst role in building a solid edge AI virtual network of research facilities and laboratories to benefit the European research and industrial community. The NoE multidisciplinary concept provide an arena for matchmaking, exchanging ideas, tools, and services, by bringing together the leading research centres, AI-on-demand platforms, digital innovation hubs, AI projects and initiatives. The ultimate goal for the dAIEDGE NoE is to support Europe to become a global centre of excellence with unique human-centred edge AI competence addressing the social and economic challenges and the needs of the citizens and society.
Project Leader : Haralampos Stratigopoulos
01/09/2023
Compréhension et atténuation d’erreur dans les implémentations analogiques de réseaux de neurones sur silicium
Project Leader : Haralampos Stratigopoulos
01/10/2022
Récupération d'énergie mécanique proche des limites physiques par synthèse adiabatique de la dynamique électromécanique
C23/0800
Project Leader : Dimitri Galayko
01/10/2022
Architectures matérielles fiables pour l'Intelligence Artificielle de confiance
Project Leader : Haralampos Stratigopoulos
25/01/2022
CORIOLIS - Plate-forme pour la synthèse physique de circuits intégrés
Coriolis est une plate-forme logicielle pour la recherche d'algorithmes, le développement d'outils et l'évaluation de nouveaux flots de conception physique VLSI. Les procédés technologiques actuels, nanométriques, posent de nouveaux défis aux flots de CAO. Les recherches académiques concernent souvent la résolution de problèmes trop spécifiques, indépendemment d'autres algorithmes, faute de pouvoir inter-opérer avec eux. Or il est capital de pouvoir évaluer les interactions entre les différents outils au sein d'un flot complet de conception. La plate-frome CORIOLIS, conçue en C++, est faite pour permettre l'inter-opérabilité des différents briques logicielles qui l'utilisent. Elle propose actuellement dessolutions aux problèmes de partitionnement, de placement et routage de circuits numériques, en technologie nanométrique.
Project Leader : Jean-Paul CHAPUT
01/01/2004
CAIRO - Circuits Analogiques Intégrés Réutilisables et Optimisés
L'objectif du projet CAIRO est de développer des méthodes et des outils autorisant une réutilisation des cellules analogiques et une capitalisation de connaissances du concepteur sous forme des cellules IP (Intellectual Property) portables d’une technologie à l'autre et d’un jeu de spécifications à l'autre. Le langage CAIRO+, ensemble de fonctions C++, est un langage de création d’IP analogiques permettant de structurer, de formaliser et d’automatiser en grande partie le flot de conception analogique. Il est utilisé pour créer une procédure appelée «générateur» pour une cellule analogique. A l'étape actuelle d'avancement du projet, la structure électrique de la cellule (i.e. le schéma électrique non dimensionné) est figée par le concepteur. Le générateur doit permettre un dimensionnement des composants de la cellule (définition de la taille des transistors, des capacités etc.) et de synthétiser le layout – le tout en fonction des spécifications de la cellule et des paramètres technologiques. L'écriture du générateur de la cellule est à la charge du concepteur, notamment, la partie qui concerne le dimensionnement électrique du circuit. Un des points forts du langage CAIRO+ est, sans doute, la possibilité de synthétiser le layout d'une manière quasi-automatique, à partir du schéma électrique dimensionné – la fonction de génération du layout fait partie des modules «natifs» du langage. De plus, le dimensionnement électrique peut prendre en compte les éléments parasites du layout (nous disons «peut», car tout dépend de la volonté du concepteur qui définit la procédure de dimensionnement). Dans ce cas, plusieurs cycles «dimensionnement de la cellule – synthèse du layout» peuvent être nécessaires. Un des pôles d'intérêt de ce groupe est la conception de modulateurs sigma-delta temps continu. Dans cette activité nous nous attachons à capitaliser l’effort de conception en développant des méthodes et des outils permettant une réutilisation des résultats. La structure complexe des modulateurs, incluant un grand nombre de cellules de fonctionnalité identique mais de spécifications différentes (telles que GmC, amplificateurs), offre un contexte approprié pour l’application de la méthodologie implémentée dans CAIRO+.
Project Leader : Marie-Minerve LOUËRAT
01/01/2004