| Current teams : | ALMASTY ALSOC APR BD CIAN ComplexNetworks DECISION DELYS LFI MOCAH MoVe NPA PEQUAN PolSys QI RO SMA SYEL |
| Former team : | ACASA |
| Publications ALSOC | 2023 | 2024 | Total |
|---|---|---|---|
| Books | 0 | 0 | 0 |
| Edited books | 0 | 0 | 0 |
| Journal articles | 6 | 1 | 7 |
| Book chapters | 0 | 0 | 0 |
| Conference papers | 9 | 7 | 16 |
| Habilitations | 0 | 0 | 0 |
| Thesis | 3 | 2 | 5 |
- G. Almaless, F. Wajsbürt : “Does Shared-Memory, Highly Multi-Threaded, Single-Application Scale on Many-Cores?”, 4th USENIX Workshop on Hot Topics in Parallelism, Berkeley, CA, United States [Almaless 2012a]
- G. Almaless, F. Wajsbürt : “On The Scalability of Image and Signal Processing Parallel Applications on Emerging cc-NUMA Many-cores”, DASIP International Conference on Design and Architectures for Signal and Image Processing, Karlsruhe, Germany [Almaless 2012c]
- P. Berthomé, K. Heydemann, X. Kauffmann‑Tourkestansky, J.‑F. Lalande : “High level model of control flow attacks for smart card functional security”, AReS 2012 - 7th International Conference on Availability, Reliability and Security, Prague, Czechia, pp. 224-229, (IEEE Computer Society) [Berthomé 2012]
- B. Bodin, A. Munier‑Kordon, B. Dupont De Dinechin : “K-Periodic schedules for evaluating the maximum throughput of a Synchronous Dataflow graph”, Proceedings 2012 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), Samos, Greece, pp. 152-159 [Bodin 2012]
- M. Djemal, F. Pêcheux, D. Potop‑Butucaru, R. De Simone, F. Wajsbürt, Zh. Zhang : “Programmable routers for efficient mapping of applications onto NoC-based MPSoCs”, DASIP 2012 -Conference on Design and Architectures for Signal and Image Processing, Karlsruhe, Germany, pp. 1-8, (IEEE) [Djemal 2012]
- D. Genius, Kh. Zine el Abidine : “A Hierarchical Approach to the Out-of-order Arrival of Frames in Video Streaming Applications on Clustered MPSoC”, International Conference on Design and Architecture for Signal and Image Processing, Karlsruhe, Germany, pp. 1-8, (IEEE) [Genius 2012a]
- D. Genius, Kh. Zine el Abidine : “A Solution to the Data Re-ordering Problem for Multi-Pipeline Streaming Applications on Clustered MPSoC”, 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, United Kingdom, pp. 1-8, (IEEE) [Genius 2012b]
- D. Genius, Kh. Zine el Abidine : “Handling Out-of-order Arrival for Parallel Streaming Applications on Clustered MPSoC”, Conference on Design of Circuits and Integrated Systems, Avignon, France [Genius 2012c]
- E. Guthmuller, I. Miro‑Panades, A. Greiner : “Adaptive Stackable 3D Cache Architecture for Manycores”, VLSI (ISVLSI), 2012 IEEE Computer Society Annual Symposium on, Amherst, MA, United States, pp. 39-44 [Guthmuller 2012]
- C. Hanen, A. Munier‑Kordon : “Equivalence of two classical list scheduling algorithms for dependent tasks with release dates and due dates on parallel processors”, Project Management and Scheduling conference, Leuwen, Belgium [Hanen 2012a]
- A. Lévêque, F. Pêcheux, M.‑M. Louërat, H. Aboushady, F. Cenni, S. Scotti, A. Massouri, L. Clavier : “Holistic Modeling of Embedded Systems with Multi-Discipline Feedback: Application to a Precollision Mitigation Braking System”, Design, Automation and Test in Europe (DATE'12), Dresden, Germany, pp. 739-744, (EDAA Publishing) [Lévêque 2012]
- M. Rosière, J.‑L. Desbarbieux, N. Drach, F. Wajsbürt : “An Out-of-Order Superscalar Processor on FPGA: The ReOrder Buffer Design”, DATE Design Automation and Test in Europe Conference, Dresden, Germany, pp. 1549-1554, (IEEE) [Rosière 2012]
- S.‑H. Syed‑Alwi, C. Braunstein, E. Encrenaz : “AN EFFICIENT REFINEMENT STRATEGY EXPLOITING COMPONENT PROPERTIES IN A CEGAR PROCESS”, Forum on specification & Design Languages (FDL 2012), Vienne, Austria, pp. 27-34 [Syed-Alwi 2012]
- L. Zaourar, A. Munier‑Kordon : “Algorithme d'approximation pour le test de mémoires.”, Congrès annuel de la société française de Recherche Opérationnelle et d'Aide à la Décision, Angers, France [Zaourar 2012a]
- L. Zaourar, A. Munier‑Kordon : “An approximation algorithm for testing memories of an integrated circuit”, Fourth International Workshop on Bin Packing and Placement Constraints BPPC'12, Nantes, France, pp. 1-6 [Zaourar 2012b]