1 Docteur 2014

Publications 2011-2016

• 2016
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High-Level Virtual Prototyping of Signal Integrity in Bus Communication”, IEEE Transactions on Components Packaging and Manufacturing Technology, vol. 6 (6), pp. 864-872 (2016)
• 2015
  • O. Tsiakaka, M. Terosiet, O. Romain, A. Histace, H. Benali, P.‑F. Pradat, F. Vallette, M. Feher, S. Feruglio : “In Vivo NIRS Monitoring in Pig Spinal Cord Tissues”, EMBC 2015 - 37^th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, Milan, Italy, pp. 4262-4265, (IEEE) (2015)
  • O. Tsiakaka, O. Romain, M. Terosiet, A. Histace, H. Benali, P.‑F. Pradat, F. Vallette, A. Alexandre‑Gauthier, M. Feher, S. Feruglio : “Study of the Spinal Cord Activity in the Pig”, 5èmes Journées d'Etude sur la TéléSANté (JETSAN), Compiègne, France (2015)
• 2014
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in a USB 3.0 System”, Micro/Nano-Electronics Packaging and Assembly, Design and Manufacturing (MiNaPAD), Grenoble, France (2014)
• 2013
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in a High Frequency Point-to-Point System with SystemC-AMS”, Conference on Design of Circuits and Integrated Systems (DCIS), Donostia-San Sebastian, Spain, pp. 1-4 (2013)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in High Frequency USB 3.0 Systems with SystemC-AMS”, Colloque du GDR Systemes materiels-logiciels integres, Lyon, France (2013)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “Modeling of Signal Integrity in Bus Communications with Timed Data Flow SystemC-AMS”, FDL 2013 - Forum on Specification Design Languages, Paris, France, pp. 1-6, (ISBN: 1636-9874) (2013)
• 2012
  • M. Terosiet, S. Feruglio, F. Vallette, D. Galayko, P. Garda : “A Self-Sufficient Digitally Controlled Ring Oscillator Robust to Supply Voltage Fluctuation”, Colloque du GDR SOC-SIP, Paris, France, pp. 1-2 (2012)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in Field Bus Communication with SystemC-AMS”, IEEE International Conference on Electronics, Circuits and Systems (ICECS), Seville, Spain, pp. 889-892, (IEEE), (ISBN: 978-1-4673-1261-5) (2012)
  • R. Wang, M. Alassir, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “Modeling Field Bus Communication with SystemC-AMS”, Colloque du GDR SOC-SIP, Paris, France, pp. 1-4 (2012)
• 2011
  • M. Terosiet, S. Feruglio, F. Vallette, P. Garda, O. Romain, J. Le Kernec : “A Self-Sufficient Digitally Controlled Ring Oscillator Compensated for Supply Voltage Variation”, The IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Beirut, Lebanon, pp. 484-487, (IEEE), (ISBN: 978-1-4577-1845-8) (2011)