WAJSBÜRT Franck
Associate Professor
Team : ALSOC
Tel: +33 1 44 27 52 53, Franck.Wajsburt (at) nulllip6.fr
https://lip6.fr/Franck.Wajsburt
Team : ALSOC
- Sorbonne Université - LIP6
Boîte courrier 169
Couloir 24-25, Étage 4, Bureau 420
4 place Jussieu
75252 PARIS CEDEX 05
FRANCE
Tel: +33 1 44 27 52 53, Franck.Wajsburt (at) nulllip6.fr
https://lip6.fr/Franck.Wajsburt
Research activity
Mes travaux se placent à l’interface entre le logiciel et le matériel dans les systèmes sur puce (SoC) avec l’objectif de trouver comment modifier le matériel (composant, architecture ou protocole) pour améliorer le fonctionnement des applications logicielles, ou comment modifier les couches logicielles (système d’exploitation, pilote de périphérique ou modèle de programmation) pour profiter des spécificités du matériel ou s’affranchir de ses contraintes.
Les projets auxquels je participe, les thèses que je co-encadre et les stages que je supervise relèvent tous des thèmes suivants :
- Architecture de circuits ou de composants numériques.
- Protocole de communication et protocole de gestion de la mémoire pour systèmes embarqués.
- Cohébergement sécurisé d’applications dans les MPSOC (système sur puce multiprocesseur). • Système d’exploitation pour les systèmes embarqués et pour les manycores.
1995-2020 Publications
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2020
- F. Laniel, D. Carver, J. Sopena, F. Wajsbürt, J. Lejeune, M. Shapiro : “MemOpLight: Leveraging application feedback to improve container memory consolidation”, NCA 2020 - 19th IEEE International Symposium on Network Computing and Applications, Cambridge / Virtual, United States, pp. 1-10 (2020)
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2019
- F. Laniel, D. Carver, J. Sopena, F. Wajsbürt, J. Lejeune, M. Shapiro : “Highlighting the Container Memory Consolidation Problems in Linux”, NCA 2019 - 18th IEEE International Symposium on Network Computing and Applications, Cambridge, United States, pp. 1-4, (IEEE) (2019)
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2016
- B. Robisson, M. Agoyan, P. Soquet, S. Le‑Henaff, F. Wajsbürt, P. Bazargan‑Sabet, G. Phan : “Smart security management in secure devices”, Journal of Cryptographic Engineering, (Springer) (2016)
- P.‑Y. Péneau, M. Karaoui, F. Wajsbürt : “Migration de processus pour un multi-noyau large échelle”, ComPAS: Conférence en Parallélisme, Architecture et Système, Lorient, France (2016)
- C. Dévigne, J.‑B. Bréjon, Quentin L. Meunier, F. Wajsbürt : “Executing Secured Virtual Machines within a Manycore Architecture”, Microprocessors and Microsystems: Embedded Hardware Design, (Elsevier) (2016)
- M. Karaoui, P.‑Y. Péneau, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “Exploiting Large Memory using 32-bit Energy-Efficient Manycore Architectures”, 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, Lyon, France, pp. 61-68, (IEEE) (2016)
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2015
- H. Liu, C. Dévigne, L. Garcia, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “RWT: Suppressing Write-Through Cost When Coherence is Not Needed”, Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, Montpellier, France, pp. 434-439, (IEEE) (2015)
- B. Robisson, M. Agoyan, P. Soquet, S. Le Henaff, F. Wajsbürt, P. Bazargan‑Sabet, G. Phan : “SMART SECURITY MANAGEMENT IN SECURE DEVICES”, PROOFS: Security Proofs for Embedded Systems, Saint-Malo, France (2015)
- M. Karaoui, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “GECOS : Mécanisme de synchronisation passant à l’échelle à plusieurs lecteurs et un écrivain pour structures chaînées”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 34, pp. 53-78, (Lavoisier) (2015)
- C. Dévigne, J.‑B. Bréjon, Quentin L. Meunier, F. Wajsbürt : “Executing secured virtual machines within a manycore architecture”, Proceedings of the IEEE Nordic Circuits and Systems Conference (NORCAS), Oslo, Norway (2015)
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2014
- M. Karaoui, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “Mécanisme de synchronisation scalable à plusieurs lecteurs et un écrivain”, Conférence en Parallélisme, Architecture et Systèmes, ComPAS 2014, Neuchâtel, Switzerland (2014)
- Th. Carle, M. Djemal, D. Genius, F. Pêcheux, D. Potop‑Butucaru, R. De Simone, F. Wajsbürt, Zh. Zhang : “Reconciling performance and predictability on a many-core through off-line mapping”, Proceedings ReCoSoC 2014, Montpellier, France, pp. 1-8, (IEEE) (2014)
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2013
- G. Plouviez, E. Encrenaz, F. Wajsbürt : “A formally verified hypervisor with hardware support for a many-core chip”, The 1st Workshop on Runtime and Operating Systems for the Many-core Era, ROME 2013, vol. 8374, Lecture Notes in Computer Science, Aachen, Germany, pp. 801-811, (Springer) (2013)
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2012
- M. Djemal, F. Pêcheux, D. Potop‑Butucaru, R. De Simone, F. Wajsbürt, Zh. Zhang : “Programmable routers for efficient mapping of applications onto NoC-based MPSoCs”, DASIP 2012 -Conference on Design and Architectures for Signal and Image Processing, Karlsruhe, Germany, pp. 1-8, (IEEE) (2012)
- G. Almaless, F. Wajsbürt : “On The Scalability of Image and Signal Processing Parallel Applications on Emerging cc-NUMA Many-cores”, DASIP International Conference on Design and Architectures for Signal and Image Processing, Karlsruhe, Germany (2012)
- G. Almaless, F. Wajsbürt : “On the Impact of Many-Cores Small Caches on the Scalability of Shared-Memory Highly Multi-Threaded Single-Applications”, the 3rd Asia-Pacific Workshop on Systems, Seoul, Korea, Republic of (2012)
- G. Almaless, F. Wajsbürt : “Does Shared-Memory, Highly Multi-Threaded, Single-Application Scale on Many-Cores?”, 4th USENIX Workshop on Hot Topics in Parallelism, Berkeley, CA, United States (2012)
- M. Rosière, J.‑L. Desbarbieux, N. Drach, F. Wajsbürt : “An Out-of-Order Superscalar Processor on FPGA: The ReOrder Buffer Design”, DATE Design Automation and Test in Europe Conference, Dresden, Germany, pp. 1549-1554, (IEEE) (2012)
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2011
- M. Rosière, J.‑L. Desbarbieux, N. Drach, F. Wajsbürt : “MORPHEO: a high-performance processor generator for a FPGA implementation”, DASIP IEEE International Conference on Design and Architectures for Signal and Image Processing, Tampere, Finland, pp. 1-8, (IEEE) (2011)
- B. Robisson, M. Agoyan, S. Bouquet, M. Nguyen, S. Le Henaff, P. Soquet, G. Phan, F. Wajsbürt, P. Bazargan‑Sabet, N. Drach : “Management of the security in smart secure devices”, SSI 2010 - Smart Systems Integration, Dresden, Germany, pp. 1-9 (2011)
- B. Robisson, M. Agoyan, S. Le Henaff, P. Soquet, G. Phan, F. Wajsbürt, P. Bazargan‑Sabet : “Implementation of complex strategies of security in secure embedded systems”, NTMS 2011 - 4th IFIP International Conference on New Technologies, Mobility and Security, Paris, France, pp. 1-5, (IEEE) (2011)
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2010
- M. Agoyan, P. Bazargan Sabet, K. Bekkou, B. Sylvain, S. Le Henaff, E. Lepavec, M. Nguyen, G. Phan, B. Robisson, P. Soquet, F. Wajsbürt : “Smart On Smart”, Colloque « Systèmes embarqués, sécurité et sûreté de fonctionnement », Toulouse, France (2010)
- P. Soquet, B. Robisson, M. Agoyan, G. Phan, P. Bazargan Sabet, F. Wajsbürt : “Strategy Of Security on Smart On Smart”, PACA Security Trends In embedded Security, Gardanne, France (2010)
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2004
- M. Diaby, M. Tuna, J.‑L. Desbarbieux, F. Wajsbürt : “High level synthesis methodology from C to FPGA used for a network protocol communication.”, RSP 2004 - 15th International Workshop on Rapid System Prototyping, Geneva, Switzerland, pp. 103-108, (IEEE) (2004)
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2001
- O. Glück, A. Zerrouki, J.‑L. Desbarbieux, A. Fenyö, A. Greiner, F. Wajsbürt, C. Spasevski, F. Silva, E. Dreyfus : “Protocol and Performance Analysis of the MPC Parallel Computer”, 15th International Parallel and Distributed Processing Symposium (IPDPS 2001), San Francisco, CA, United States, (IEEE) (2001)
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2000
- A. Zerrouki, J. Dunoyer, F. Wajsbürt, A. Derieux : “Design of the Hadamard Coprocessor with the Alliance CAD System carried by Post-Graduating Students”, 3rd European Workshop on Microelectronics Education (EWME), Aix En Provence, France, pp. 265-268, (Springer) (2000)
- A. Zerrouki, O. Glück, J.‑L. Desbarbieux, A. Fenyö, A. Greiner, C. Spasevski, F. Wajsbürt, F. Silva, E. Dreyfus : “The MPC Parallel Computer : Hardware, Low-level Protocols and Performances”, Parallel and Distributed Computing and Systems (PDCS 2000), vol. 1, Las Vegas, United States, pp. 87-92 (2000)
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1998
- F. Wajsbürt, F. Pétrot, K. Dioury : “Transistor Controlled Slew Rate Process Independent PCI Compliant I/O Buffer with Possible Power/Delay Trade-off”, Microelectronics Journal, vol. 29 (10), pp. 733-740, (Elsevier) (1998)
- A. Greiner, P. David, J.‑L. Desbarbieux, A. Fenyö, J.‑J. Lecler, F. Potter, V. Reibaldi, F. Wajsbürt, B. Zerrouk : “La machine MPC”, Calculateurs Paralleles Reseaux et Systemes Repartis, vol. 10 (1), pp. 71-84, (La Boucle informatique) (1998)
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1997
- F. Wajsbürt, J.‑L. Desbarbieux, C. Spasevski, S. Penain, A. Greiner : “An Integrated PCI Component for IEEE 1355”, European Multimedia Microprocessor Systems and Electronic Commerce Conference and Exhibition (EMMSEC'97), Florence, Italy (1997)
- F. Wajsbürt, K. Dioury, F. Pétrot : “Low Power, Process Independent, Full Transistor Controlled Slew Rate, PCI Compliant I/O pads”, 21st International Conference on Microelectronics, Nis, Serbia, pp. 811-814, (IEEE) (1997)
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1995
- F. Wajsbürt : “Conception et réalisation d’un microprocesseur VLIW : Architecture Interne”, thesis, phd defence 12/02/1995, supervision Greiner, Alain (1995)