责任导师 : Patrick GARDA

助理责任导师 : DENOULET Julien, FERUGLIO Sylvain, VALLETTE Farouk

High-level modeling of signal integrity in communication buses

The continuing growth of electronic technology has led to smaller size, higher density of integration and higher frequencies. As a result, signal integrity analysis becomes nowadays a more and more critical challenge in the electronic system design process. To address this issue, designers have proposed and used several approaches. However, in respect of the higher heterogeneity of modern applications, along with an aggressive reduction of time-to-market, a new modeling methodology is required to provide the system’s signal integrity performance at a high-level of abstraction. Moreover, it should be easily interoperable with a functional model of this system. The aim of this work is to propose a new modeling methodology for signal integrity analysis that can meet these requirements. Our method is based on the combination of two kinds of blocks, named functional blocks and nonfunctional blocks. They are built in C/C++ or SystemC/SystemC-AMS, and can therefore be easily simulated in a single environment. The functional block is used to model the ideal behavior of the system. The non-functional block is used to represent the highly nonlinear and non-ideal behaviors, caused by signal integrity issues. In the non-functional block, neural networks are used to model these non-ideal behaviors. To validate our method, we developed two applications based on I2C application and USB 3.0. Our method greatly increases simulation speed (running 20% faster than a low-level SystemC/SystemCAMS equivalent model, or 99% faster than a SPICE equivalent model). Furthermore, our method achieves very good accuracy (relative absolute error is around 3%). Finally, our method is a flexible approach, since our models can be parameterized, to help designers to configure their systems. It’s also modular: a model of a complex application can be built by combining models of each component. In the future, this original method for high-level modeling of signal integrity could be integrated in the forthcoming design flours of cyber-physical systems.

2012-2016 刊物

• 2016
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High-Level Virtual Prototyping of Signal Integrity in Bus Communication”, IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 6 (6), pp. 864-872, (Institute of Electrical and Electronics Engineers) (2016)
• 2014
  • R. Wang : “Modélisation du niveau système de l’intégrité du signal dans les système hétérogènes”, 博士论文, 答辩 2014-7-15, 责任导师 Garda, Patrick, 助理责任导师 : Denoulet, Julien, Feruglio, Sylvain, Vallette, Farouk (2014)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in a USB 3.0 System”, Micro/Nano-Electronics Packaging and Assembly, Design and Manufacturing (MiNaPAD), Grenoble, France (2014)
• 2013
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in a High Frequency Point-to-Point System with SystemC-AMS”, Conference on Design of Circuits and Integrated Systems (DCIS), Donostia-San Sebastian, Spain, pp. 1-4 (2013)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “Modeling of signal integrity in bus communications with timed data flow SystemC-AMS”, FDL 2013 - Forum on Specification Design Languages, Paris, France, pp. 1-6 (2013)
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High Level Modeling of Signal Integrity in High Frequency USB 3.0 Systems with SystemC-AMS”, Colloque du GDR Systemes materiels-logiciels integres, Lyon, France (2013)
• 2012
  • R. Wang, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “High level modeling of signal integrity in field bus communication with SystemC-AMS”, Electronics, Circuits and Systems (ICECS), 2012 19^th IEEE International Conference on, Seville, Spain, pp. 889-892 (2012)
  • R. Wang, M. Alassir, J. Denoulet, S. Feruglio, F. Vallette, P. Garda : “Modeling Field Bus Communication with SystemC-AMS”, Colloque du GDR SOC-SIP, Paris, France, pp. 1-4 (2012)