BAWA Rajesh K
Postdoc -
ASIM
Departure date : 12/31/1998
1997-1999 Publications
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1999
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1998
- L. Jacomme, F. Pétrot, Rajesh K. Bawa : “Formal Extraction of Memorizing Elements for Sequential VHDL Synthesis”, IEEE/EUROMICRO'98 International Conference on Digital Sytems, Vasteras, Sweden, pp. 317-320, (IEEE) (1998)
- F. Rahim, Rajesh K. Bawa, A. Amara : “VHDL based Verification of RISC pipelined Processor INFINTY : A Case Study”, IEEE/ACM International Workshop on Logic Synthesis (IWLS'98), Lake Tahoe, United States (1998)
- F. Rahim, E. Encrenaz, M. Minoux, Rajesh K. Bawa : “Modular Model Checking of VLSI Designs described in VHDL”, IEEE International Conference on Computer and their Applications, Honolulu, Hawai, United States, pp. 365-368 (1998)
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1997
- I. Augé, Rajesh K. Bawa, P. Guerrier, A. Greiner, L. Jacomme, F. Pétrot : “User Guided High Level Synthesis”, International Conference on Very Large Scale Integration (VLSI'97), IFIP - The International Federation for Information Processing, Gramado, Brazil, pp. 464-475, (Springer) (1997)
- L. Jacomme, Rajesh K. Bawa : “Synthèse de descriptions comportementales séquentielles en conformité avec la sémantique VHDL”, 1er Colloque CAO de Circuits Intégrés et Systèmes, Grenoble, France, pp. 303-306 (1997)