Side-channel attacks can infer information about the manipulated data or the executed operations on a circuit, by observing the power consumption, the electromagnetic emissions or the execution time. They represent a serious threat for embedded devices and different countermeasures exist to protect against them, sush as masking. In this thesis, we propose a method with a symbolic approach that allows to analyse codes with 1st order masking, in order to give guarantees on the absence of leakage. This method has been implemented in a tool called ARISTI that analyses, at the assembly level, the robustness of masked codes. The aim is to analyse codes after the compiler transformations because they could alter the masking. We also propose a model of the leakage sources in an ARM cortex-M3 processor. The leakage model at the micro-architecture level takes into account the pipelined execution of the instructions and captures interactions that are invisible at the ISA level. The analysis tool ARISTI has been extended to take into account this leakage model. We show that ARISTI allows to find micro-architectural leakages in codes masked at the assembly or source level.