Actividad de investigación

Design-for-test, built-in self-test, self-healing, on-line test, diagnosis and failure analysis techniques for analog, mixed-signal, and RF circuits and systems, machine learning, computer-aided design.

3 Estudiantes de doctorado (Dirección de investigación / Co-supervisión)

• ALI EL SAYED Sarah : Solutions de test intégré et d’auto-adaptation pour les systèmes de communication sans fil
• LEONHARD Julian : Sécurité et confiance du matériel analogique.
• SPYROU Theofilos : No title

Publicaciones 2015-2019

• 2019
  • J. Leonhard, M.‑M. Louërat, H. Aboushady, O. Sinanoglu, Haralampos‑G. Stratigopoulos : “Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application”, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Laussane, Switzerland (2019)
  • J. Leonhard, M. Yasin, Sh. Turk, M. Nabeel, M.‑M. Louërat, R. Chotin‑Avot, H. Aboushady, O. Sinanoglu, Haralampos‑G. Stratigopoulos : “MixLock: Securing Mixed-Signal Circuits via Logic Locking”, Design, Automation and Test in Europe (DATE 2019), Proceedings of the 2019 Design, Automation and Test in Europe, Florence, Italy, pp. 84-89 (2019)
  • S. Ali El‑Sayed, L. Camuñas‑Mesa, B. Linares‑Barranco, Haralampos‑G. Stratigopoulos : “Self-Testing Analog Spiking Neuron Circuit”, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lausanne, Switzerland (2019)
• 2018
  • D. Genius, M.‑M. Louërat, F. Pêcheux, L. Apvrille, Haralampos‑G. Stratigopoulos : “Modeling Heterogeneous Embedded Systems with TTool”, DUHDe 2018 — 5^th Workshop on Design Automation for Understanding Hardware Designs, Dresden, Germany (2018)
  • N. Shimizu, J. Akita, M.‑M. Louërat, Haralampos‑G. Stratigopoulos, J.‑P. Chaput, D. Galayko : “Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping”, 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, (IEEE) (2018)
• 2017
  • Haralampos‑G. Stratigopoulos, Ch. Streitwieser : “Adaptive Test with Test Escape Estimation for Mixed-Signal ICs”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (IEEE) (2017)
  • A. Ahmadi, Haralampos‑G. Stratigopoulos, K. Huang, A. Nahar, B. Orr, M. Pas : “Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36 (12), pp. 2120-2133, (IEEE) (2017)
  • Haralampos‑G. Stratigopoulos, Ch. Streitwieser : “Adaptive Test Flow for Mixed-Signal ICs”, IEEE 35^th VLSI Test Symposium, Las Vegas, USA, pp. 1-6, (IEEE) (2017)
• 2016
  • G. RENAUD, Manuel J. Barragan, A. Laraba, Haralampos‑G. Stratigopoulos, S. Mir, H. Le‑Gall, H. Naudet : “A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs”, Journal of Electronic Testing, (Springer Verlag) (2016)
  • M. Barragan, R. Alhakim, Haralampos‑G. Stratigopoulos, M. Dubois, S. Mir, H. Le‑Gall, N. Bhargava, A. Bal : “A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2016)
  • M. Andraud, Haralampos‑G. Stratigopoulos, E. Simeu : “One-Shot Non-Intrusive Calibration Against Process Variations for Analog/RF Circuits”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2016)
  • Manuel J. Barragan, Haralampos‑G. Stratigopoulos, S. Mir, H. Le‑Gall, N. Bhargava, A. Bal : “Practical Simulation Flow for Evaluating Analog and Mixed-Signal Test Techniques”, IEEE Design & Test (2016)
  • A. Dimakos, Haralampos‑G. Stratigopoulos, A. Siligaris, S. Mir, E. De Foucauld : “Built-in test of millimeter-wave circuits based on non-intrusive sensors”, Design, Automation & Test in Europe Conference, Dresden, Germany (2016)
  • A. Ahmadi, Haralampos‑G. Stratigopoulos, A. Nahar, B. Orr, M. Pas, Y. Makris : “Harnessing fabrication process signature for predicting yield across designs”, IEEE International Symposium on Circuits and Systems, Montreal, Canada (2016)
  • Haralampos‑G. Stratigopoulos, B. Kaminska : “Analog and Mixed-Signal Test”, chapter in Electronic Design Automation for Integrated Circuits Handbook, (CRC Press) (2016)
  • “Proceedings of IEEE European Test Symposium (ETS 2016)”, S. Hamdioui, M. Michael, G. Di Natale, Haralampos-G. Stratigopoulos (Eds.), Amsterdam, Netherlands, (IEEE) (2016)
• 2015
  • A. Laraba, Haralampos‑G. Stratigopoulos, S. Mir, H. Naudet : “Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique”, IEEE Transactions on Circuits and Systems - Part I, pp. 2391-2400 (2015)
  • A. Dimakos, Haralampos‑G. Stratigopoulos, A. Siligaris, S. Mir, E. Foucauld : “Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors”, Journal of Electronic Testing, vol. 31 (4), pp. 381-394, (Springer Verlag) (2015)
  • Haralampos‑G. Stratigopoulos, Manuel J. Barragan, S. Mir, H. Le‑Gall, N. Bhargava, A. Bal : “Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times”, IEEE International Test Conference, Anaheim, CA, United States (2015)
  • A. Ahmadi, Haralampos‑G. Stratigopoulos, A. Nahar, B. Orr, M. Pas, M. Yiorgos : “Yield forecasting in fab-to-fab production migration based on Bayesian Model Fusion”, IEEE/ACM International Conference on Computer-Aided Design, Austin, TX, United States, pp. 9-14 (2015)