| Current teams : | ALMASTY ALSOC APR BD CIAN ComplexNetworks DECISION DELYS LFI MOCAH MoVe NPA PEQUAN PolSys QI RO SMA SYEL |
| Former team : | ACASA |
| Publications ALSOC | 2023 | 2024 | Total |
|---|---|---|---|
| Books | 0 | 0 | 0 |
| Edited books | 0 | 0 | 0 |
| Journal articles | 6 | 1 | 7 |
| Book chapters | 0 | 0 | 0 |
| Conference papers | 9 | 7 | 16 |
| Habilitations | 0 | 0 | 0 |
| Thesis | 3 | 2 | 5 |
- E. Amouri, H. Mrabet, Z. Marrakchi, H. Mehrez : “Improving the Security of Dual Rail Logic in FPGA Using Controlled Placement and Routing”, ReConFig International Conference on Reconfigurable Computing and FPGAs 2009, Cancun, Mexico, pp. 201-206, (IEEE) [Amouri 2009a]
- E. Amouri, H. Mrabet, Z. Marrakchi, H. Mehrez : “Placement and Routing Techniques to Improve Delay Balance of WDDL Netlist in MFPGA”, IEEE International Conference on Electronics, Circuits, and Systems - ICECS 2009, Hammamet, Tunisia, pp. 791-794, (IEEE) [Amouri 2009b]
- S. Baarir, C. Braunstein, R. Clavel, E. Encrenaz, J.‑M. Ilié, R. Leveugle, I. Mounier, L. Pierre, D. Poitrenaud : “Complementary formal approaches for dependability analysis”, The 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Chicago, Illinois, United States, pp. 331-339, (IEEE Computer Society) [Baarir 2009a]
- M. Benabdenbi, F. Pêcheux, E. Faure : “Online test and monitoring of multiprocessor socs : A software-based approach”, LATW’09 : Proceedings of the 10th Latin America Test Workshop, Buzios, Rio de Janeiro, Brazil, pp. 1-6, (IEEE) [Benabdenbi 2009]
- M. Benazouz, O. Marchetti, A. Munier‑Kordon, P. Urard : “A Polynomial Algorithm for the Computation of Buffer Capacities with Throughput Constraint for Embedded System Design”, CIE IEEE International Conference on Computers & Industrial Engineering, Troyes, France, pp. 690-695, (IEEE) [Benazouz 2009]
- A. Djabelkhir, N. Drach, K. Heydemann, F. Arzel : “Parallélisation supervisée pour les multicoeurs embarqués”, SympA Symposium en Architecture de Machines, Toulouse, France [Djabelkhir 2009]
- U. Farooq, H. Parvez, Z. Marrakchi, H. Mehrez : “A New Tree-based coarse-grained FPGA Architecture”, IEEE International Conference on PhD. Research in MicroElectronics, PRIME'09, Cork, Ireland, pp. 48-51, (IEEE) [Farooq 2009]
- O. Gamoudi, N. Drach, K. Heydemann : “Vers une méthode adaptative de préchargement de données”, SympA Symposium en Architecture de Machines, Toulouse, France [Gamoudi 2009]
- D. Genius, A. Munier‑Kordon, Kh. Zine el Abidine : “A Buffer Space Optimal Solution for Re-establishing the Packet Order in a MPSoC Network Processor”, Euro-Par European Conference on Parallel computing, vol. 5704, Lecture Notes in Computer Science, Delft, Netherlands, pp. 216-227, (Springer) [Genius 2009]
- A. Greiner, E. Faure, N. Pouillon, D. Genius : “A Generic Hardware / Software Communication Middleware for Streaming Applications on Shared Memory Multi Processor Systems-on-Chip”, FDL Forum on Specification & Design Languages, Nice, France, pp. 1-4 [Greiner 2009]
- Z. Marrakchi, U. Farooq, H. Mrabet, H. Mehrez : “Comparison of Tree-Based and Mesh-Based Coarse-Grained FPGA Architectures”, ICM International Conference on Microelectronics, Marrakech, Morocco, pp. 248-251, (IEEE) [Marrakchi 2009b]
- M. Nguyen, B. Robisson, M. Agoyan, N. Drach : “Evaluation of the Time-Redundant Fault Tolerance on the ALU for Simple Pipelined Processor”, 4th Annual Austin Conference on Integrated Systems & Circuits, Austin, United States [Nguyen 2009]
- H. Ozaktas, K. Heydemann : “Compression de code pour processeurs haute-performance”, SympA Symposium en Architecture de Machines, Toulouse, France [Ozaktas 2009a]
- H. Ozaktas, K. Heydemann, Ch. Rochange, H. Cassé : “Impact of Code Compression on Estimated Worst-Case Execution Times”, 17th International Conference on Real-Time and Network Systems, Paris, France, pp. 55-66 [Ozaktas 2009b]
- H. Parvez, Z. Marrakchi, H. Mehrez : “ASIF: Application Specific Inflexible FPGA”, ICFPT International Conference on Field-Programmable Technology, Sydney, Australia, pp. 112-119, (IEEE) [Parvez 2009]
- J. Porquet, Ch. Schwarz, A. Greiner : “Multi-compartment: A new architecture for secure co-hosting on SoC”, SoC International Symposium on System-on-Chip, Tampere, Finland, pp. 124-127, (IEEE) [Porquet 2009]
- N. Pouillon, A. Bécoulet, A. Vieira De Mello, F. Pêcheux, A. Greiner : “A Generic Instruction Set Simulator API for Timed and Untimed Simulation and Debug of MP2-SoCs”, IEEE/IFIP International Symposium on Rapid System Prototyping, 2009. RSP '09., Paris, France, pp. 116-122 [Pouillon 2009]
- A. Suelflow, G. Fey, C. Braunstein, U. Kuehne, R. Drechsler : “Increasing the Accuracy of SAT-Based Debugging”, DATE Design Automation and Test in Europe Conference, Nice, France, pp. 1326-1331, (IEEE) [Suelflow 2009]