Équipe : CIAN
Date de départ : 30/11/2012

Direction de recherche : Alain GREINER

Co-encadrement : ABOUSHADY Hassan

Environnement de conception multi-niveaux unifié appliqué aux systèmes mixtes

Nowadays, System-on-Chips containing digital, analog and RF blocks are very common and are present in almost all electronic devices. A system-level model containing both the analog and digital parts is very important to determine the circuit specifications and to validate the desired system performance. Tools available to model such systems are currently lacking: Matlab, a widely used high-level simulator is not compatible with the integrated circuit design flow. VHDL-AMS, a language for analog mixed-signal circuit description is very time-consuming for large systems. Recently, an AMS extension of SystemC, called SystemC AMS, has filled this gap of Mixed Signal modeling in a system level. At the circuit level, the conventional analog design methodologies have been mainly based on the analog designer approximated calculations and computer-aided simulations for tuning. The design time of analog and RF blocks is very dependent on the designer's experience. When the CMOS process or the specifications are changed a complete redesign is necessary. Moreover, it is very difficult to optimize the overall design of a complex mixed-signal circuit because the design and simulation environments used for the digital blocks are very different from those used for the analog and RF blocks. The following points summarize the contributions realized in this work:

  • The first implementation of a fairly complex Mixed Signal model in SystemC-AMS: a Wireless Sensor Network node.
  • Refined models for a generic and configurable approach of system-level modeling.
  • An accurate linear and nonlinear circuit performance evaluation tool for system-level refined models back-annotation and circuit-level optimized design.
  • An optimized circuit design methodology based on an accurate sizing tool and the circuit performance evaluation tool.
  • A unified Mixed Signal design environment with a very strong interaction between system-level simulation and optimized circuit-level design.

Soutenance : 04/10/2012 - 14h - Site Jussieu 55-65/211

Membres du jury :

A. Vachoux, Professeur, Ecole Polytechnique Fédérale de Lausanne [Rapporteur]
Gilles Jacquemod, Professeur, Polytech' Nice Sophia-Antipolis [Rapporteur]
Ian O'Connor, Professeur, Ecole Centrale de Lyon
Serge Scotti, Ingénieur, STMicroelectronics
Marie Minèrve Louerat, Chargée de recherche UPMC
François Pecheux, Maitre de conférences UPMC
Alain Greiner, Professeur UPMC
Hassan Aboushady, Maitre de conférences UPMC

Publications 2007-2012