Publikationen 2015-2018

• 2018
  • R. Chotin‑Avot, U. Farooq, M. Azeem, M. Ravoson, H. Mehrez : “Novel architectural space exploration environment for multi-FPGA based prototyping systems”, Microprocessors and Microsystems: Embedded Hardware Design, vol. 56, pp. 169-183, (Elsevier) (2018)
• 2016
  • M. Azeem, R. Chotin‑Avot, U. Farooq, M. Ravoson, H. Mehrez : “Multiple FPGAs based prototyping and debugging with complete design flow”, IDT 2016 - 11^th International Design & Test Symposium, Hammamet, Tunisia, pp. 171-176, (IEEE) (2016)
  • U. Farooq, R. Chotin‑Avot, M. Azeem, M. Ravoson, H. Mehrez : “Inter-FPGA Routing Environment for Performance Exploration of Multi-FPGA Systems”, Rapid System Prototyping (RSP), Pittsburgh, United States, pp. 1-6 (2016)
  • U. Farooq, R. Chotin‑Avot, M. Azeem, Z. Cherif, M. Ravoson, S. Khan, H. Mehrez : “Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration”, Euromicro Conference on Digital System Design (DSD), Limassol, Cyprus, pp. 641-645, (IEEE) (2016)
• 2015
  • M. Azeem, A. Brière, M. Bouyer, J. Denoulet, F. Pêcheux, A. Pinna, B. Granado : “Interfacing SoCLib CABA models with NoCBench for NoC perfomance evaluation”, DASIP 2015 - The 2015 Conference on Design and Architecturesfor Signal and Image Processing, Cracow, Poland (2015)
  • M. Azeem, A. Khan, U. Azeem : “On the Performance of Tanner Graph Based and Viterbi Decoding for Erasure Recovery”, VTC Fall 2015 - IEEE 82^nd Vehicular Technology Conference, Boston, MA, United States, pp. 1-5, (IEEE) (2015)