Supervision : Alain GREINER

Co-supervision : MEUNIER Quentin, WAJSBÜRT Franck

Execution sécurisée d'applications sur plate-forme many-cores

Manycore architectures, which comprise a lot of cores, are a way to answer the always growing demand for digital data processing, especially in a context of cloud computing infrastructures. These data, which can belong to companies as well as private individuals, are sensitive by nature, and this is why the isolation problematic is primordial. Yet, since the beginning of cloud computing, virtualization techniques are more and more used to allow different users to physically share the same hardware resources. This is all the more true for manycore architectures, and it partially comes down to the architectures to guarantee that data integrity and confidentiality are preserved for the software it executes.
We propose in this thesis a secured virtualization environment for a manycore architecture. Our mechanism relies on hardware components and a hypervisor software to isolate several operating systems running on the same architecture. The hypervisor is in charge of allocating resources for the virtualized operating systems, but does not have the right to access the resources allocated to these systems. Thus, a security flaw in the hypervisor does not imperil data confidentiality and integrity of the virtualized systems.
Our solution is evaluated on a cycle-accurate virtual prototype and has been implemented in a coherent shared memory manycore architecture. Our evaluations target the hardware and performance overheads added by our mechanisms. Finally, we analyze the security provided by our solution.

2015-2017 Publications

• 2017
  • C. Devigne : “Execution sécurisée d’applications sur plate-forme many-cores”, thesis, defence 07/06/2017, supervision Greiner, Alain, co-supervision : Meunier, Quentin, Wajsbürt, Franck (2017)
• 2016
  • C. Dévigne, J.‑B. Bréjon, Quentin L. Meunier, F. Wajsbürt : “Executing Secured Virtual Machines within a Manycore Architecture”, Microprocessors and Microsystems: Embedded Hardware Design, (Elsevier) (2016)
• 2015
  • H. Liu, C. Dévigne, L. Garcia, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “RWT: Suppressing Write-Through Cost When Coherence is Not Needed”, Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, Montpellier, France, pp. 434-439, (IEEE) (2015)
  • C. Dévigne, J.‑B. Bréjon, Quentin L. Meunier, F. Wajsbürt : “Executing secured virtual machines within a manycore architecture”, Proceedings of the IEEE Nordic Circuits and Systems Conference (NORCAS), Oslo, Norway (2015)