责任导师 : Marie-Minerve LOUËRAT

助理责任导师 : ISKANDER Ramy

A methodology for analysis and verification of the substrate noise coupling in HV/HT integrated circuits for automotive applications

Automotive application is a growing market for smart power integrated circuits (ICs). The smart power ICs miniaturize the electronic systems and improve their functionality for the vehicles. Product robustness and reliability in smart power ICs are vital aspects in automotive applications. However, failures due to substrate noise coupling are still reported in tests after fabrication. The sources of this noise are the injection of majority and minority carriers in the substrate. The majority carriers propagation is well modeled, however, the minority carriers propagation can not be modeled by the conventional modeling techniques.
In the first part of this work, we explore a new modeling technique proposed by a research group in EPFL. It relies on models that are capable of maintaining the minority carriers concentration and gradient. It allows the substrate parasitic extraction taking into account both majority and minority carriers. A CAD tool (AUTOMICS) is developed by our team in UPMC and is used to extract the substrate parasitic network encapsulating the new modeling technique.
In the second part of this work, we introduce a new methodology for smart power ICs design and failure analysis using the tool. It focuses on failures due to minority carriers coupling. The proposed methodology is validated on an industrial test case (AUTOCHIP1). This test case was designed in ams and validated by Valeo. This test case suffers from a latch-up problem. This problem is not recognized by conventional simulations. Using our methodology, we manage to reproduce the behavior in simulation environment.
The third part of this work presents system and circuit level design for a DC-DC buck converter. This system is considered as a complex system to validate our proposed methodology. The circuit was fabricated using 0.35 um HV-CMOS technology. The high voltage switches serve as aggressors injecting minority carriers in the substrate. An analog sensitive circuit, which is the bandgap, is considered as a victim. The effect of the substrate coupling is studied and simulation results show acceptable consistency with the measurements.

2013-2016 刊物

• 2016
  • Y. Moursy : “Une méthodologie de conception pour l’immunisation des circuits intégrés HV/HT contre les couplages de substrat pour les applications automobiles”, 博士论文, 答辩 2016-5-20, 责任导师 Louërat, Marie-Minerve, 助理责任导师 : Iskander, Ramy (2016)
  • Y. Moursy, H. Zou, R. Iskander, P. Tisserand, D.‑M. Ton, G. Pasetti, Eh. Seebacher, A. Steinmair, Th. Gneiting, H. Alius : “Towards Automatic Diagnosis of Minority Carriers Propagation Problems in HV/HT Automotive Smart Power ICs”, Design, Automation & Test in Europe Conference & Exhibition (DATE) 2016 Conference, Dresde, Germany (2016)
  • H. Zou, Y. Moursy, R. Iskander, J.‑P. Chaput, M.‑M. Louërat : “An Adaptive Mesh Refinement Strategy of Substrate Modeling for Smart Power ICs”, 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, Canada, pp. 2358-2361 (2016)
  • Y. Moursy, R. Khalil, S. Lecce, V. Poletto, R. Iskander, M.‑M. Louërat : “Mixed-Signal PI Controller in Current-Mode DC-DC Buck Converter for Automotive Applications”, IEEE International Symposium on Circuits and Systems (ISCAS'16), Montréal, Canada, pp. 1610-1613, (IEEE) (2016)
  • Y. Moursy, H. Zou, R. Khalil, R. Iskander, P. Tisserand, D.‑M. Ton, G. Pasetti, M.‑M. Louërat : “Efficient Substrate Noise Coupling Verification and Failure Analysis Methodology for Smart Power ICs in Automotive Applications”, IEEE Transactions on Power Electronics, (Institute of Electrical and Electronics Engineers) (2016)
  • H. Zou, Y. Moursy, R. Iskander, A. Steinmair, H. Gensinger, Eh. Seebacher, J.‑P. Chaput, M.‑M. Louërat : “Using CAD Tool for Substrate Parasitic Modeling in Smart Power Technology”, IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 2323-2333, (IEEE) (2016)
• 2015
  • H. Zou, Y. Moursy, R. Iskander, J.‑P. Chaput, M.‑M. Louërat, C. Stefanucci, P. Buccella, M. Kayal, J.‑M. Sallese, Th. Gneiting, H. Alius, A. Steinmair, Eh. Seebacher : “A CAD integrated solution of substrate modeling for industrial IC design”, 2015 20^th International Mixed-Signal Testing Workshop (IMSTW), Paris, France (2015)
  • Y. Moursy, R. Iskander, M.‑M. Louërat : “Automated triangular wave generator design with process corners compensation”, Mixed-Signal Testing Workshop (IMSTW), 2015 20^th International, Paris, France, pp. 1-6, (IEEE) (2015)
  • C. Stefanucci, P. Buccella, Y. Moursy, H. Zou, R. Iskander, M. Kayal, J.‑M. Sallese : “Substrate modeling to improve reliability of high voltage technologies”, 20^th International Mixed-Signal Testing Workshop (IMSTW), 2015, Paris, Paris, France (2015)
  • H. Zou, Y. Moursy, R. Iskander, C. Stefanucci, P. Buccella, M. Kayal, J.‑M. Sallese : “Substrate noise modeling with dedicated CAD framework for smart power ICs”, 2015 IEEE International Symposium on Circuits and Systems (ISCAS) n°1554, Lisbon, Portugal, pp. 4 (2015)
  • Y. Li, H. Zou, Y. Moursy, R. Iskander, R. Sobot, M.‑M. Louërat : “Optimization and Co-Simulation of an Implantable Telemetry System by Linking System Models to Nonlinear Circuits”, chapter in Computational Intelligence in Analog an Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, pp. 83-113, (Springer) (2015)
• 2014
  • H. Zou, Y. Moursy, R. Iskander, M.‑M. Louërat, J.‑P. Chaput : “A novel CAD framework for substrate modeling”, 10^th Conference on Ph.D Research in Microelectronics and electronics, Grenoble, France, pp. 1-4, (IEEE) (2014)
• 2013
  • Y. Moursy, S. Afara, P. Buccella, C. Stefanucci, R. Iskander, M. Kayal, J.‑M. Sallese, M.‑M. Louërat, J.‑P. Chaput, M. Thomas Tomasevic , S. Ben Dhia, A. Boyer, B. Guegan, V. Poletto, A. Roggero, T. Cavioni, E. Novarini, Eh. Seebacher, A. Steinmair, P. Tisserand, D.‑M. Ton, Th. Bousquet, Th. Gneiting : “AUTOMICS: A novel approach for substrate modeling for Automotive applications”, 18^th IEEE European Test Symposium, Avignon, France (2013)