责任导师 : Habib MEHREZ

助理责任导师 : TUNA Matthieu

Methodology for Automatic Generation of Custom Prototyping Platform for Embedded Systems

Multi-FPGA based prototyping is no longer optional for hardware/software integration. We can classify multi-FPGA prototyping platforms in three categories: off-the-shelf, custom and cabling. The cabling platform is semi off-the-shelf and semi custom.
Nevertheless, crafting a custom and a cabling platform is today a manual process, which is time-consuming. The performance and the cost of the platform lie on the FPGA expertise and SoC DUT knowledge of the engineers. Compared to OTS platforms, the added value, in terms of performance, of cabling or custom platforms can be heavily impaired by an inefficient board design. Moreover, FPGA I/Os are becoming a scarce resource, worsening the inter-FPGA bandwidth generation after generation. Therefore, it becomes more and more difficult to prototype an SoC/ASIC design at proper performance.
The contributions of the manuscript are: (1). An automatic implementation flow for an OTS platform is proposed. (2). An automatic design flow for creating a custom platform is proposed, thus increasing the productivity, enabling the board exploration, and optimizing cost and performance. (3). The cabling platform is proposed where one board is composed of one FPGA and several connectors, with an algorithm to automatically find a solution for the cable distribution. (4). Thanks to the developed automatic tools, the three different multi-FPGA platforms are compared. The custom platform always achieves better performance and lower deployment cost, but still with 3-5 months in time of availability. If the performance or the deployment cost are not rigorous constraints, the cabling platform offers an attractive alternative compared to others.
Keywords- Integrated Circuit, Verification, Multi-FPGA, Prototyping, Custom, Cabling

2012-2015 刊物

• 2015
  • Q. Tang : “Methodology for Automatic Generation of Custom Prototyping Platform for Embedded Systems”, 博士论文, 答辩 2015-1-13, 责任导师 Mehrez, Habib, 助理责任导师 : Tuna, Matthieu (2015)
• 2014
  • Q. Tang, M. Tuna, H. Mehrez : “Future Inter-FPGA Communication Architecture for Multi-FPGA Based Prototyping”, ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '14, Monterey, CA, United States, pp. 251-251, (ACM) (2014)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, Z. Marrakchi, H. Mehrez, Q. Tang : “Towards high performance GHASH for pipelined AES-GCM using FPGAs”, ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '14, Monterey, CA, United States, pp. 242-242, (ACM) (2014)
  • Q. Tang, M. Tuna, H. Mehrez : “Multi-FPGA Prototyping Board Issue : the FPGA I/O Bottleneck”, Proceedings of International Conference on Embedded Computer Systems : Architectures, Modeling, and Simulation, Agios Konstantinos, Greece, pp. 207-214 (2014)
  • Q. Tang, M. Tuna, H. Mehrez : “Performance Comparison between Multi-FPGA Prototyping Platforms: Hardwired Off-the-Shelf, Cabling and Custom”, Proceedings of International Symposium on Field-Programmable Custom Computing Machines, Boston, MA, United States, pp. 125-132, (IEEE) (2014)
• 2013
  • Q. Tang, M. Tuna, H. Mehrez : “Routing algorithm for multi-FPGA based systems using multi-point physical tracks”, RSP 2013 - 24^th IEEE International Symposium on Rapid System Prototyping, Montreal, Canada, pp. 2-8, (IEEE) (2013)
  • Q. Tang : “Flot de Conception Automatique pour Créer une Carte Multi-FPGA”, Journées Nationales du Réseau Doctoral en Microélectronique, Grenoble, France (2013)
  • Q. Tang, M. Tuna, Z. Marrakchi, H. Mehrez : “Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist”, Proceedings of the 9^th International Symposium on Applied Reconfigurable Computing, ARC 2013, vol. 7806, Lecture Notes in Computer Science, Los Angeles, United States, pp. 221, (Springer) (2013)
• 2012
  • Q. Tang, M. Tuna, H. Mehrez : “Design for prototyping of a parameterizable cluster-based Multi-Core System-on-Chip on a multi-FPGA board”, Proceedings of the 23^rd IEEE International Symposium on Rapid System Prototyping, Tampere, Finland, pp. 71-77 (2012)