责任导师 : Habib MEHREZ

助理责任导师 : CHOTIN Roselyne

Authenticated Encryption on FPGAs from the Reconfigurable Part to the Static Part

Communication systems need to access, store, manipulate, or communicate sensitive information. Therefore, cryptographic primitives such as hash functions and block ciphers are deployed to provide encryption and authentication. Recently, techniques have been invented to combine encryption and authentication into a single algorithm which is called Authenticated Encryption (AE). Combining these two security services in hardware produces better performance compared to two separated algorithms since authentication and encryption can share a part of the computation. Because of combining the programmability with the performance of custom hardware, FPGAs become more common as an implementation target for such algorithms.
The first part of this thesis is devoted to efficient and high-speed FPGA-based architectures of AE algorithms, AES-GCM and AEGIS-128, in order to be used in the reconfigurable part of FPGAs to support security services of communication systems. Our focus on the state of the art leads to the introduction of high-speed architectures for slow changing keys applications like Virtual Private Networks (VPNs). Furthermore, we present an efficient method for implementing the GF(2^128) multiplier, which is responsible for the authentication task in AES-GCM, to support high-speed applications. Additionally, an efficient AEGIS-128 is also implemented using only five AES rounds. Our hardware implementations were evaluated using Virtex-5 and Virtex-4 FPGAs. The performance of the presented architectures (Thr./Slices) outperforms the previously reported ones.
The second part of the thesis presents techniques for low cost solutions in order to secure the reconfiguration of FPGAs. We present different ranges of low cost implementations of AES-GCM, AES-CCM, and AEGIS-128, which are used in the static part of the FPGA in order to decrypt and authenticate the FPGA bitstream. Presented ASIC architectures were evaluated using 90 and 65 nm technologies and they present better performance compared to the previous work.

2012-2016 刊物

• 2016
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs”, Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, Prague, Czechia, pp. 37-40, (ACM) (2016)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “AES-GCM and AEGIS: Efficient and High Speed Hardware Implementations”, Journal of Signal Processing Systems, pp. 1-12, (Springer) (2016)
• 2014
  • K. Moussa Ali Abdellatif : “Authenticated Encryption on FPGAs from the Reconfigurable Part to the Static Part”, 博士论文, 答辩 2014-10-7, 责任导师 Mehrez, Habib, 助理责任导师 : Chotin, Roselyne (2014)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “Authenticated Encryption on FPGAs from the Static Part to the Reconfigurable Part”, Microprocessors and Microsystems: Embedded Hardware Design, vol. 38 (6), pp. 526-538, (Elsevier) (2014)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm”, 10^th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, ARC 2014, vol. 8405, Lecture Notes in Computer Science, Vilamoura, Portugal, pp. 13-24, (Springer) (2014)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, Z. Marrakchi, H. Mehrez, Q. Tang : “Towards high performance GHASH for pipelined AES-GCM using FPGAs”, ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '14, Monterey, CA, United States, pp. 242-242, (ACM) (2014)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “Low cost Solutions for Secure Remote Reconfiguration of FPGAs”, International Journal of Embedded Systems, vol. 6 (2-3), pp. 257-265, (Inderscience) (2014)
• 2013
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “Improved Method for Parallel AES-GCM Cores Using FPGAs”, ReConFig 2013 - International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, pp. 1-4, (IEEE) (2013)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “Lightweight and Compact Solutions for Secure Reconfiguration of FPGAs”, International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, pp. 1-4, (IEEE) (2013)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “High Speed Authenticated Encryption for Slow Changing Key Applications Using Reconfigurable Devices”, Wireless Days (WD), 2013 IFIP, Valencia, Spain, pp. 1-6 (2013)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “Protecting FPGA Bitstreams Using Authenticated Encryption”, 11^th IEEE International Conference of New Circuits and Systems (NEWCAS), Paris, France, pp. 1-4, (IEEE) (2013)
• 2012
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “Efficient Parallel-Pipelined GHASH for Message Authentication”, International Conference on Reconfigurable Computing and FPGAs (ReConFig 2012), Cancun, Mexico, pp. 1-6 (2012)
  • K. Moussa Ali Abdellatif, R. Chotin‑Avot, H. Mehrez : “The Effect of S-box Design on Pipelined AES Using FPGAs”, Colloque GDR SOC-SIP, Paris, France, pp. 1-4 (2012)