Publications 2009-2025

• 2025
  • N. Amiot, Quentin L. Meunier, K. Heydemann, E. Encrenaz : “aLEAKator: HDL Mixed-Domain Simulation for Masked Hardware & Software Formal Verification”, (2025)
• 2024
  • X. Hu, Quentin L. Meunier, E. Encrenaz : “Blind-Folded: Simple Power Analysis Attacks using Data with a Single Trace and no Training”, IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2025 (1), pp. 475-496, (IACR) (2024)
• 2023
  • Q. Meunier, A. Taleb : “VerifMSI: Practical Verification of Hardware and Software Masking Schemes Implementations”, Proceedings of the 20^th International Conference on Security and Cryptography SECRYPT, vol. 1, Rome, Italy, pp. 520-527, (SciTePress), (ISBN: 978-989-758-666-8) (2023)
  • Quentin L. Meunier, E. Pons, K. Heydemann : “LeakageVerif: Efficient and Scalable Formal Verification of Leakage in Symbolic Expressions”, IEEE Transactions on Software Engineering, vol. 49 (6), pp. 3359-3375, (Institute of Electrical and Electronics Engineers) (2023)
  • Th. Romera, A. Petreto, F. Lemaitre, M. Bouyer, Quentin L. Meunier, L. Lacassagne, D. Etiemble : “Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs”, Journal of Real-Time Image Processing, vol. 20 (2), pp. 32, (Springer Verlag) (2023)
• 2022
  • A. Grandmaison, K. Heydemann, Quentin L. Meunier : “ARMISTICE: Microarchitectural Leakage Modeling for Masked Software Formal Verification”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41 (11), pp. 3733-3744, (IEEE) (2022)
• 2021
  • Th. Romera, A. Petreto, F. Lemaitre, M. Bouyer, Q. Meunier, L. Lacassagne : “Implementations Impact on Iterative Image Processing for Embedded GPU”, European Signal Processing Conference (EUSIPCO), Dublin, Ireland (2021)
  • P. VIVET, E. Guthmuller, Y. Thonnart, G. Pillonnet, C. Fuguet, I. Miro‑Panades, G. Moritz, J. Durupt, Ch. Bernard, D. Varreau, J. Pontes, S. Thuries, D. Coriat, M. Harrand, D. Dutoit, D. Lattard, L. Arnaud, J. Charbonnier, P. Coudrain, A. Garnier, F. Berger, A. Gueugnot, A. Greiner, Q. Meunier, A. Farcy, A. Arriordaz, S. Chéramy, F. Clermidy : “IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management”, IEEE Journal of Solid-State Circuits, vol. 56 (1), pp. 79-97, (Institute of Electrical and Electronics Engineers) (2021)
  • N. Belleville, D. Couroussé, E. Encrenaz, K. Heydemann, Q. Meunier : “PROSECCO: Formally-proven secure compiled code”, Automation in Cybersecurity 2021 - Proceedings of the 28^th Computer & Electronics Security Application Rendezvous (C&ESAR 2021), vol. 3056, CEUR Workshop Proceedings, Rennes, France, pp. 13-25, (ceur-ws.org) (2021)
• 2020
  • Quentin L. Meunier, I. Ben El Ouahma, K. Heydemann : “SELA: a Symbolic Expression Leakage Analyzer”, International Workshop on Security Proofs for Embedded Systems, Visioconference, France (2020)
  • N. Belleville, D. Couroussé, K. Heydemann, Q. Meunier, I. Ben El Ouahma : “Maskara: Compilation of a Masking Countermeasure with Optimised Polynomial Interpolation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39 (11), (IEEE) (2020)
  • P. VIVET, E. Guthmuller, Y. Thonnart, G. Pillonnet, G. Moritz, I. Miro‑Panades, C. Fuguet, J. Durupt, Ch. Bernard, D. Varreau, J. Pontes, S. Thuries, D. Coriat, M. Harrand, D. Dutoit, D. Lattard, L. Arnaud, J. Charbonnier, P. Coudrain, A. Garnier, F. Berger, A. Gueugnot, A. Greiner, Quentin L. Meunier, A. Farcy, A. Arriordaz, S. Chéramy, F. Clermidy : “A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm 2 Inter-Chiplet Interconnects and 156mW/mm 2 @ 82%-Peak-Efficiency DC-DC Converters”, 2020 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, United States, pp. 46-48, (IEEE) (2020)
  • A. Petreto, Th. Romera, F. Lemaitre, M. Bouyer, B. Gaillard, P. Menard, Q. Meunier, L. Lacassagne : “Real-time embedded video denoiser prototype”, 9^th International Symposium - Optronics in Defense and Security (Optro), Paris, France (2020)
• 2019
  • A. Petreto, Th. Romera, F. Lemaitre, I. Masliah, B. Gaillard, M. Bouyer, Q. Meunier, L. Lacassagne : “Débruitage temps réel embarqué pour vidéos fortement bruitées”, COMPAS 2019, Anglet, France (2019)
  • I. Ben El Ouahma, Q. Meunier, K. Heydemann, E. Encrenaz : “Side-channel robustness analysis of masked assembly codes using a symbolic approach”, Journal of Cryptographic Engineering, pp. 1-12, (Springer) (2019)
  • J.‑B. Bréjon, K. Heydemann, E. Encrenaz, Quentin L. Meunier, S. Vu : “Fault attack vulnerability assessment of binary code”, Cryptography and Security in Computing Systems (CS2’19), Valencia, Spain, pp. 13-18, (ACM) (2019)
  • A. Petreto, Th. Romera, I. Masliah, B. Gaillard, M. Bouyer, Q. Meunier, L. Lacassagne, F. Lemaitre : “A New Real-Time Embedded Video Denoising Algorithm”, DASIP 2019 - The Conference on Design and Architectures for Signal and Image Processing, Montréal, Canada (2019)
  • Quentin L. Meunier : “FastCPA: Efficient Correlation Power Analysis Computation with a Large Number of Traces”, 6^th Cryptography and Security in Computing Systems (CS2’19), Cryptography and Security in Computing Systems, Valence, Spain, (Association for Computing Machinery) (2019)
• 2018
  • A. Hennequin, L. Lacassagne, L. Cabaret, Q. Meunier : “A new Direct Connected Component Labeling and Analysis Algorithms for GPUs”, 2018 Conference on Design and Architectures for Signal and Image Processing (DASIP), Porto, Portugal (2018)
  • A. Petreto, A. Hennequin, Th. Koehler, Th. Romera, Y. Fargeix, B. Gaillard, M. Bouyer, Q. Meunier, L. Lacassagne : “Energy and Execution Time Comparison of Optical Flow Algorithms on SIMD and GPU Architectures”, Conference on Design and Architectures for Signal and Image Processing (Dasip 2018), Porto, Portugal (2018)
  • E. Guthmuller, C. Fuguet, P. Vivet, C. Bernard, I. Miro‑Panades, J. Durupt, E. Beigne, D. Lattard, S. Cheramy, A. Greiner, Quentin L. Meunier, P. Bazargan Sabet : “A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches”, ESSCIRC 2018 - IEEE 44^th European Solid State Circuits Conference (ESSCIRC), Dresden, Germany, pp. 318-321, (IEEE) (2018)
  • A. Petreto, A. Hennequin, Th. Koehler, Th. Romera, Y. Fargeix, B. Gaillard, M. Bouyer, Q. Meunier, L. Lacassagne : “Comparaison de la consommation énergétique et du temps d’exécution d’un algorithme de traitement d’images optimisé sur des architectures SIMD et GPU”, Conférence d’informatique en Parallélisme, Architecture et Système (COMPAS 2018), Toulouse, France (2018)
  • A. Petreto, A. Hennequin, Th. Koehler, Th. Romera, Y. Fargeix, B. Gaillard, M. Bouyer, Q. Meunier, L. Lacassagne : “Comparaison de la consommation énergétique et du temps d’exécution d’un algorithme de traitement d’images optimisé sur des architectures SIMD et GPU”, GdR SOC2, Paris, France (2018)
  • Quentin L. Meunier, Y. Thierry Mieg, E. Encrenaz : “Modeling a Cache Coherence Protocol with the Guarded Action Language”, Workshop on Models for Formal Analysis of Real Systems, Thessaloniki, Greece (2018)
• 2017
  • I. Ben El Ouahma, Quentin L. Meunier, K. Heydemann, E. Encrenaz : “Symbolic Approach for Side-Channel Resistance Analysis of Masked Assembly Codes”, Security Proofs for Embedded Systems, Taipei, China (2017)
  • H. Liu, Quentin L. Meunier, A. Greiner : “Decoupling Translation Lookaside Buffer Coherence from Cache Coherence”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2017), Bochum, Germany, pp. 92-97, (IEEE) (2017)
• 2016
  • C. Dévigne, J.‑B. Bréjon, Quentin L. Meunier, F. Wajsbürt : “Executing Secured Virtual Machines within a Manycore Architecture”, Microprocessors and Microsystems: Embedded Hardware Design, (Elsevier) (2016)
  • M. Karaoui, P.‑Y. Péneau, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “Exploiting Large Memory using 32-bit Energy-Efficient Manycore Architectures”, 10^th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, Lyon, France, pp. 61-68, (IEEE) (2016)
• 2015
  • H. Liu, C. Dévigne, L. Garcia, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “RWT: Suppressing Write-Through Cost When Coherence is Not Needed”, Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, Montpellier, France, pp. 434-439, (IEEE) (2015)
  • M. Karaoui, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “GECOS : Mécanisme de synchronisation passant à l’échelle à plusieurs lecteurs et un écrivain pour structures chaînées”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 34, pp. 53-78, (Lavoisier) (2015)
  • C. Dévigne, J.‑B. Bréjon, Quentin L. Meunier, F. Wajsbürt : “Executing secured virtual machines within a manycore architecture”, Proceedings of the IEEE Nordic Circuits and Systems Conference (NORCAS), Oslo, Norway (2015)
• 2014
  • M. Karaoui, Quentin L. Meunier, F. Wajsbürt, A. Greiner : “Mécanisme de synchronisation scalable à plusieurs lecteurs et un écrivain”, Conférence en Parallélisme, Architecture et Systèmes, ComPAS 2014, Neuchâtel, Switzerland (2014)
• 2011
  • N. Jean‑Charles, D. Ménard, Quentin L. Meunier, O. Sentieys : “Evaluation de la précision en virgule fixe dans le cas des structures conditionnelles”, 14^th Symposium en Architecture (SympA'11), Saint Malo, France (2011)
  • J.‑Ch. Naud, Quentin L. Meunier, D. Ménard, O. Sentieys : “Fixed-point Accuracy Evaluation in the Context of Conditional Structures”, 19^th European Signal Processing Conference (EUSIPCO), Barcelona, Spain (2011)
  • Quentin L. Meunier, F. Pétrot : “Systèmes de mémoire transactionnelle pour les architectures à base de NoC Conception, implémentation et comparaison de deux politiques”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 30 (9), pp. 1061-1087, (Lavoisier) (2011)
• 2010
  • Quentin L. Meunier, F. Pétrot, J.‑L. Roch : “Hardware/software support for adaptive work-stealing in on-chip multiprocessor”, Journal of Systems Architecture, vol. 56 (08), pp. 392-406, (Elsevier) (2010)
  • Quentin L. Meunier, F. Pétrot : “Lightweight Transactional Memory systems for NoCs based architectures: Design, implementation and comparison of two policies”, Journal of Parallel and Distributed Computing, vol. 70 (10), pp. 1024-1041, (Elsevier) (2010)
• 2009
  • F. Pétrot, Quentin L. Meunier : “Design and Use of Transactional Memory in MPSoCs”, 9^th International Seminar on Application Specific Multiprocessor SoC, Savanah, Georgia, United States (2009)
  • Quentin L. Meunier, F. Pétrot : “LightTM : Une Mémoire Transactionnelle conçue pour les MPSoCs”, Symposium en Architecture de machines (SympA'13), Toulouse, France, pp. 1-12 (2009)
  • Quentin L. Meunier, F. Pétrot : “Lightweight Transactional Memory Systems for Large Scale Shared Memory MPSoCs”, NEWCAS – TAISA'09 Conference, Toulouse, France, pp. 432-435, (IEEE Computer Society) (2009)