Supervision : François PÊCHEUX

Co-supervision : DENOULET Julien

Modélisation système d’une architecture d’interconnexion RF reconfigurable pour les many-cœurs

The growing number of cores in a single chip goes along with an increase in communications. The variety of applications running on the chip causes spatial and temporal heterogeneity of communications. To address these issues, we present in this thesis a dynamically reconfigurable interconnect based on Radio Frequency (RF) for intra chip communications. The use of RF allows to increase the bandwidth while minimizing the latency. Dynamic reconfiguration of the interconnect allows to handle the heterogeneity of communications. We present the rationale for choosing RF over optics and 3D, the detailed architecture of the network and the chip implementing it, the evaluation of its feasibility and its performances. During the evaluation phase we were able to show that for a CMP of 1 024 tiles, our solution allowed a performance gain of 13 %. One advantage of this RF interconnect is the ability to broadcast without additional cost compared to point-to-point communications, opening new perspectives in terms of cache coherence.

2014-2019 Publications

• 2019
  • Th. Romera, A. Brière, J. Denoulet : “Dynamically Reconfigurable RF-NoC with Distance-Aware Routing Algorithm”, 14^th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2019), York, United Kingdom (2019)
• 2018
  • A. Brière, Th. Romera, J. Denoulet : “Modélisation et évaluation d’une architecture many-coeurs basée sur un réseau sur puce RF”, 13^e colloque du GDR SOC-SIP du CNRS, Paris, France (2018)
• 2017
  • A. Brière : “Modélisation système d’une architecture d’interconnexion RF reconfigurable pour les many-cœurs”, thesis, defence 12/08/2017, supervision Pêcheux, François, co-supervision : Denoulet, Julien (2017)
  • A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “WiNoCoD: A Dynamically Reconfigurable RF NoC for Many-Core”, 12^e colloque du GDR SOC-SIP du CNRS, Bordeaux, France (2017)
• 2015
  • A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “Un réseau sur puce RF reconfigurable dynamiquement pour les many-cœurs”, Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, vol. 34/1-2, PARALLÉLISME , ARCHITECTURE ET SYSTÈMES - PANORAMA DE LA RECHERCHE FRANCOPHONE, pp. 11-29, (Lavoisier) (2015)
  • M. Azeem, A. Brière, M. Bouyer, J. Denoulet, F. Pêcheux, A. Pinna, B. Granado : “Interfacing SoCLib CABA models with NoCBench for NoC perfomance evaluation”, DASIP 2015 - The 2015 Conference on Design and Architecturesfor Signal and Image Processing, Cracow, Poland (2015)
  • A. Brière, E. Unlu, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, Y. Louët, Ch. Moy : “A Dynamically Reconfigurable RF NoC for Many-Core”, Proceedings of the 25^th edition on Great Lakes Symposium on VLSI, Pittsburgh, United States, pp. 139-144, (ACM) (2015)
• 2014
  • E. Unlu, M. Hamieh, Ch. Moy, M. Ariaudo, Y. Louët, F. Drillet, A. Brière, L. Zerioul, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, P. Garda, C. Duperrier, S. Quintanel, O. Romain : “An OFDMA Based RF Interconnect for Massive Multi-core Processors”, NoCS 2014 - Eighth IEEE/ACM International Symposium on Networks-on-Chip, Ferrara, Italy, pp. 182-183, (IEEE) (2014)
  • F. Drillet, M. Hamieh, L. Zerioul, A. Brière, E. Unlu, M. Ariaudo, Y. Louët, E. Bourdel, J. Denoulet, A. Pinna, B. Granado, P. Garda, F. Pêcheux, C. Duperrier, S. Quintanel, Ph. Meunier, Ch. Moy, O. Romain : “Flexible Radio Interface for NoC RF-Interconnect”, Digital System Design (DSD), 2014 17^th Euromicro Conference on, Verona, Italy, pp. 36-41, (IEEE) (2014)
  • A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux : “A hierarchical RF interconnect for MPSoC”, 9^e colloque du GDR SOC-SIP du CNRS, Paris, France (2014)
  • A. Brière, J. Denoulet, A. Pinna, B. Granado, F. Pêcheux, P. Garda, M. Ariaudo, F. Drillet, C. Duperrier, M. Hamieh, S. Quintanel, O. Romain, L. Zerioul, Y. Louët, Ch. Moy, E. Unlu, E. Bourdel : “WiNoCoD : Un réseau d’interconnexion hiérarchique RF pour les MPSoC”, ComPAS'2014 : Conférence d'informatique en Parallélisme, Architecture et Système, Neuchâtel, Switzerland, pp. track architecture (2014)